Ignore:
Timestamp:
Mar 23, 2012, 8:04:01 PM (12 years ago)
Author:
alain
Message:

Fixing a bug in the DCACHE_INVALTLB_SCAN sub-FSM:
It requires a specific register to save the return state.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/modules/vci_cc_vcache_wrapper_v4/caba/source/include/vci_cc_vcache_wrapper_v4.h

    r214 r217  
    334334    ///////////////////////////////
    335335    sc_signal<int>          r_dcache_fsm;               // state register
    336     sc_signal<int>          r_dcache_fsm_save;          // return state for coherence operation
     336    sc_signal<int>          r_dcache_fsm_cc_save;       // return state for coherence operation
     337    sc_signal<int>          r_dcache_fsm_scan_save;     // return state for tlb scan operation
    337338    // registers written in P0 stage (used in P1 stage)
    338339    sc_signal<bool>         r_dcache_p0_valid;              // P1 pipeline stage must be executed
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