- Timestamp:
- Jul 12, 2013, 12:16:30 PM (11 years ago)
- File:
-
- 1 edited
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trunk/modules/vci_io_bridge/caba/metadata/vci_io_bridge.sd
r240 r434 6 6 Module('caba:vci_io_bridge', 7 7 classname = 'soclib::caba::VciIoBridge', 8 tmpl_parameters = [ 9 parameter.Module('vci_param_d', default = 'caba:vci_param', 10 cell_size = parameter.Reference("cell_size_d"), 11 plen_size = parameter.Reference("plen_size_d"), 12 addr_size = parameter.Reference("addr_size_d"), 13 rerror_size = parameter.Reference("rerror_size_d"), 14 clen_size = parameter.Reference("clen_size_d"), 15 rflag_size = parameter.Reference("rflag_size_d"), 16 srcid_size = parameter.Reference("srcid_size_d"), 17 pktid_size = parameter.Reference("pktid_size_d"), 18 trdid_size = parameter.Reference("trdid_size_d"), 19 wrplen_size = parameter.Reference("wrplen_size_d")), 20 parameter.Module('vci_param_x', default = 'caba:vci_param', 21 cell_size = parameter.Reference("cell_size_x"), 22 plen_size = parameter.Reference("plen_size_x"), 23 addr_size = parameter.Reference("addr_size_x"), 24 rerror_size = parameter.Reference("rerror_size_x"), 25 clen_size = parameter.Reference("clen_size_x"), 26 rflag_size = parameter.Reference("rflag_size_x"), 27 srcid_size = parameter.Reference("srcid_size_x"), 28 pktid_size = parameter.Reference("pktid_size_x"), 29 trdid_size = parameter.Reference("trdid_size_x"), 30 wrplen_size = parameter.Reference("wrplen_size_x")), 31 parameter.Module('vci_param_io', default = 'caba:vci_param', 32 cell_size = parameter.Reference("cell_size_io"), 33 plen_size = parameter.Reference("plen_size_io"), 34 addr_size = parameter.Reference("addr_size_io"), 35 rerror_size = parameter.Reference("rerror_size_io"), 36 clen_size = parameter.Reference("clen_size_io"), 37 rflag_size = parameter.Reference("rflag_size_io"), 38 srcid_size = parameter.Reference("srcid_size_io"), 39 pktid_size = parameter.Reference("pktid_size_io"), 40 trdid_size = parameter.Reference("trdid_size_io"), 41 wrplen_size = parameter.Reference("wrplen_size_io")), 8 9 tmpl_parameters = [ 10 parameter.Module('vci_param_int', 11 default = 'caba:vci_param', 12 cell_size = parameter.Reference('iob_cell_size_int')), 13 parameter.Module('vci_param_ext', 14 default = 'caba:vci_param', 15 cell_size = parameter.Reference('iob_cell_size_ext')), 42 16 ], 43 header_files = [ '../source/include/vci_io_bridge.h', 44 '../source/include/transaction_tab_io.h'], 17 18 header_files = [ 19 '../source/include/vci_io_bridge.h', 20 '../source/include/transaction_tab_io.h' 21 ], 22 45 23 implementation_files = [ '../source/src/vci_io_bridge.cpp' ], 24 46 25 uses = [ Uses('caba:base_module'), 47 Uses('common:mapping_table'), 48 Uses('caba:generic_fifo'), 49 Uses('caba:generic_tlb', 50 addr_t = parameter.StringExt('sc_dt::sc_uint<%d> ', 51 parameter.Reference('addr_size'))), 52 Uses('common:address_decoding_table', 53 input_t = 'unsigned long', 54 output_t = 'bool'), 55 Uses('common:address_decoding_table', 56 input_t = 'unsigned long', 57 output_t = 'int'), 58 # Uses('common:address_masking_table', 59 # data_t = parameter.StringExt('sc_dt::sc_uint<%d> ', 60 # parameter.Reference('addr_size'))), 61 ], 62 ports = [ Port('caba:vci_initiator', 'p_vci_ini_dma'), 63 Port('caba:vci_target', 'p_vci_tgt_dma'), 64 Port('caba:vci_initiator', 'p_vci_ini_config'), 65 Port('caba:vci_target', 'p_vci_tgt_config'), 66 Port('caba:vci_initiator', 'p_vci_ini_miss'), 67 Port('caba:bit_in','p_irq', parameter.Reference('nb_periph')), 26 Uses('common:mapping_table'), 27 Uses('caba:generic_fifo'), 28 Uses('caba:generic_tlb', 29 addr_t = parameter.StringExt('sc_dt::sc_uint<%d> ', 30 parameter.Reference('addr_size'))), 31 Uses('common:address_decoding_table', 32 input_t = 'unsigned long', 33 output_t = 'bool'), 34 Uses('common:address_decoding_table', 35 input_t = 'unsigned long', 36 output_t = 'int'), 37 ], 38 39 ports = [ 40 Port('caba:vci_initiator', 'p_vci_ini_ram'), 41 Port('caba:vci_target', 'p_vci_tgt_iox'), 42 Port('caba:vci_initiator', 'p_vci_ini_iox'), 43 Port('caba:vci_target', 'p_vci_tgt_int'), 44 Port('caba:vci_initiator', 'p_vci_ini_int'), 45 Port('caba:bit_in','p_irq', 32), 68 46 Port('caba:bit_in', 'p_resetn', auto = 'resetn'), 69 Port('caba:clock_in', 'p_clk', auto = 'clock'), ], 70 instance_parameters = [ parameter.Int('nd_periph'), 71 parameter.Module('mtx', 'common:mapping_table'), 72 parameter.Module('mtd', 'common:mapping_table'), 73 parameter.Module('mtio', 'common:mapping_table'), 74 parameter.Module('seg_config_iob', 'common:segment'), 75 parameter.IntTab('tgt_index_iocluster'), 76 # parameter.IntTab('tgt_index_config'), 77 parameter.IntTab('init_index_direct'), 78 parameter.IntTab('tgt_index_iospace'), 79 parameter.IntTab('init_index_iospace'), 80 parameter.IntTab('init_index_dma'), 81 parameter.Int('dcache_words'), 82 parameter.Int('iotlb_ways'), 83 parameter.Int('iotlb_sets'), 84 parameter.Int('max_frozen_cycles'), ], 85 extensions = [ 'dsx:get_ident=' 86 'tgt_index_config:p_vci_tgt_config:mtd,' 87 'init_index_direct:p_vci_init_miss:mtd,' 88 'tgt_index_iospace:p_vci_tgt_dma:mtio,' 89 'init_index_iospace:p_vci_init_config:mtio,' 90 'init_index_dma:p_vci_ini_dma:mtx,' 91 'dsx:cpu=wrapper:iss_t', 92 'dsx:addressable=tgt_index_config,tgt_index_iospace', 93 # 'dsx:on_segment=mc:add_index:initiator_rw_index', 94 ], 47 Port('caba:clock_in', 'p_clk', auto = 'clock'), 48 ], 95 49 96 # debug = True, 50 instance_parameters = [ 51 parameter.Module('mt_ext', 'common:mapping_table'), 52 parameter.Module('mt_int', 'common:mapping_table'), 53 parameter.Module('mt_iox', 'common:mapping_table'), 54 parameter.IntTab('int_tgtid'), 55 parameter.IntTab('int_srcid'), 56 parameter.IntTab('iox_tgtid'), 57 parameter.IntTab('iox_srcid'), 58 parameter.IntTab('ext_srcid'), 59 parameter.Int('dcache_words'), 60 parameter.Int('iotlb_ways'), 61 parameter.Int('iotlb_sets'), 62 parameter.Int('debug_start_cycle'), 63 parameter.Bool('debug_ok'), 64 ], 97 65 ) 98 66
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