Changeset 629 for trunk/softs/giet_tsar/giet.S
- Timestamp:
- Feb 12, 2014, 9:51:23 AM (10 years ago)
- File:
-
- 1 edited
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trunk/softs/giet_tsar/giet.S
r622 r629 169 169 /* It depends on both the cluster_xy & local_id, */ 170 170 /* and we must use the physical address extension */ 171 mfc0 $10, $15, 1 /* $10 <= proc_id*/172 andi $10, $10, 0x3FF /* at most 1024 processors*/171 mfc0 $10, $15, 1 /* $10 <= proc_id */ 172 andi $10, $10, 0x3FF /* at most 1024 processors */ 173 173 li $11, NB_PROCS_MAX 174 174 divu $10, $11 175 mflo $12 /* $12 <= cluster_xy */176 mfhi $13 /* $13 <= local_id */177 178 li $7, 0b011110000000 /* $7 <= PRIO offset */ 179 sll $8, $13, 2 /* $8 <= local_id*4*/180 addu $9, $7, $8 /* $9 <= PRIO offset + local_id*4*/181 la $27, seg_xcu_base182 addu $26, $9, $ 27/* $26 <= seg_icu_base + PRIO offset + local_id*4 */183 184 /* XCU[cluster_xy] access to get PRIO register value */185 mtc2 $12, $24 /* set PADDR extension */186 lw $1 4, ($26) /* $14 <= PRIO register value*/187 mtc2 $0, $24 /* reset PADDR extension */188 189 /* test PTI, then HWI, then WTI */190 andi $27, $1 4, 0x1 /* test bit T in PRIO register*/191 bne $27, $0, _int_PTI /* branch to PTI handler */192 andi $27, $1 4, 0x2 /* test bit W in PRIO register*/193 bne $27, $0, _int_HWI /* branch to HWI handler */194 andi $27, $1 4, 0x4 /* test bit W in PRIO register*/195 bne $27, $0, _int_WTI /* branch to IPI handler*/175 mflo $12 /* $12 <= cluster_xy */ 176 mfhi $13 /* $13 <= local_id */ 177 la $14, seg_xcu_base /* $14 <= seg_xcu_base */ 178 179 li $7, 0b011110000000 /* $7 <= PRIO offset */ 180 sll $8, $13, 2 /* $8 <= local_id*4 */ 181 addu $9, $7, $8 /* $9 <= PRIO offset + local_id*4 */ 182 addu $26, $9, $14 /* $26 <= seg_icu_base + PRIO offset + local_id*4 */ 183 184 /* XCU[cluster_xy] access to get PRIO register value */ 185 mtc2 $12, $24 /* set PADDR extension */ 186 lw $15, ($26) /* $15 <= PRIO register value */ 187 mtc2 $0, $24 /* reset PADDR extension */ 188 189 /* test PTI, then HWI, then WTI */ 190 andi $27, $15, 0x1 /* test bit T in PRIO register */ 191 bne $27, $0, _int_PTI /* branch to PTI handler */ 192 andi $27, $15, 0x2 /* test bit W in PRIO register */ 193 bne $27, $0, _int_HWI /* branch to HWI handler */ 194 andi $27, $15, 0x4 /* test bit W in PRIO register */ 195 bne $27, $0, _int_WTI /* branch to WTI handler */ 196 196 197 197 /* exit interrupt handler: restore registers */ 198 198 _int_restore: 199 199 .set noat 200 lw $1, 4*4($29) /* restore $1 */200 lw $1, 4*4($29) 201 201 .set at 202 lw $2, 4*5($29) /* restore $2 */203 lw $3, 4*6($29) /* restore $3 */204 lw $4, 4*7($29) /* restore $4 */205 lw $5, 4*8($29) /* restore $5 */206 lw $6, 4*9($29) /* restore $6 */207 lw $7, 4*10($29) /* restore $7 */208 lw $8, 4*11($29) /* restore $8 */209 lw $9, 4*12($29) /* restore $9 */210 lw $10, 4*13($29) /* restore $10 */211 lw $11, 4*14($29) /* restore $11 */212 lw $12, 4*15($29) /* restore $12 */213 lw $13, 4*16($29) /* restore $13 */214 lw $14, 4*17($29) /* restore $14 */215 lw $15, 4*18($29) /* restore $15 */216 lw $24, 4*19($29) /* restore $24 */217 lw $25, 4*20($29) /* restore $25 */218 lw $31, 4*21($29) /* restore $31 */202 lw $2, 4*5($29) 203 lw $3, 4*6($29) 204 lw $4, 4*7($29) 205 lw $5, 4*8($29) 206 lw $6, 4*9($29) 207 lw $7, 4*10($29) 208 lw $8, 4*11($29) 209 lw $9, 4*12($29) 210 lw $10, 4*13($29) 211 lw $11, 4*14($29) 212 lw $12, 4*15($29) 213 lw $13, 4*16($29) 214 lw $14, 4*17($29) 215 lw $15, 4*18($29) 216 lw $24, 4*19($29) 217 lw $25, 4*20($29) 218 lw $31, 4*21($29) 219 219 lw $27, 4*22($29) /* get EPC */ 220 220 addiu $29, $29, 23*4 /* restore SP */ … … 222 222 eret /* exit GIET */ 223 223 224 /* The PTI handler get PTI index, */ 225 /* acknowledge the PTI register */ 226 /* and call the corresponding ISR */ 224 227 _int_PTI: 225 srl $26, $14, 6 /* $26 <= (PRIO>>6 = PTI index) */ 226 j _int_call_isr 227 nop 228 229 _int_HWI: 230 srl $26, $14, 14 /* $26 <= (PRIO>>14 = HWI index) */ 231 j _int_call_isr 232 nop 233 234 _int_WTI: 235 srl $26, $14, 22 /* $26 <= (PRIO>>22 = WTI index) */ 236 j _int_call_isr 237 nop 238 239 /* Call the relevant ISR */ 240 _int_call_isr: 241 andi $26, $26, 0x7C /* $26 <= interrupt_index * 4 */ 228 srl $26, $15, 6 /* $26 <= PRIO >> 6 */ 229 andi $26, $26, 0x7C /* $26 <= PTI_INDEX * 4 */ 230 addi $27, $14, 0x180 /* $27 <= &PTI_ACK[0] */ 231 add $27, $27, $26 /* $27 <= &PTI_ACK[PTI_INDEX] */ 232 lw $0, ($27) /* acknowledge XICU PTI */ 242 233 la $27, _interrupt_vector 243 234 addu $26, $26, $27 244 lw $26, ($26) /* read ISR address */ 245 jalr $26 /* call ISR */ 246 nop 247 j _int_restore 248 nop 249 235 lw $26, ($26) /* read ISR address */ 236 jalr $26 /* call ISR */ 237 nop 238 j _int_restore /* return from INT handler */ 239 nop 240 241 /* The HWI handler get HWI index */ 242 /* and call the corresponding ISR */ 243 _int_HWI: 244 srl $26, $15, 14 /* $26 <= PRIO >> 14 */ 245 andi $26, $26, 0x7C /* $26 <= HWI_INDEX * 4 */ 246 la $27, _interrupt_vector 247 addu $26, $26, $27 /* $26 <= &ISR[HWI_INDEX */ 248 lw $26, ($26) /* read ISR address */ 249 jalr $26 /* call ISR */ 250 nop 251 j _int_restore /* return from INT handler */ 252 nop 253 254 /* The WTI handler get WTI index, */ 255 /* acknowledge the WTI register */ 256 /* and call the corresponding ISR */ 257 _int_WTI: 258 srl $26, $15, 22 /* $26 <= PRIO >> 22 */ 259 andi $26, $26, 0x7C /* $26 <= WTI_INDEX * 4 */ 260 add $27, $14, $26 /* $27 <= &WTI_REG[WTI_INDEX] */ 261 lw $0, ($27) /* acknowledge XICU WTI */ 262 la $27, _interrupt_vector 263 addu $26, $26, $27 /* $26 <= &ISR[WTI_INDEX] */ 264 lw $26, ($26) /* read ISR address */ 265 jalr $26 /* call ISR */ 266 nop 267 j _int_restore /* return from INT handler */ 268 nop 269 250 270 /* The default ISR is called when no specific ISR has been installed */ 251 271 /* in the interrupt vector. It simply displays a message on TTY0 */
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