Changeset 686 for branches/MESI/modules/vci_cc_vcache_wrapper/caba/source/include/vci_cc_vcache_wrapper.h

Timestamp:

May 13, 2014, 12:06:31 PM (10 years ago)

Author:

haoliu

Message:

MESI cosmetic in vci_cc_vcache_wrapper and vci_mem_cache
bug fixed for LLSC

File:

• branches/MESI/modules/vci_cc_vcache_wrapper/caba/source/include/vci_cc_vcache_wrapper.h (modified) (4 diffs)

branches/MESI/modules/vci_cc_vcache_wrapper/caba/source/include/vci_cc_vcache_wrapper.h

@@ -371 +371 @@
     sc_signal<paddr_t>      r_icache_vci_paddr;         // physical address
     sc_signal<uint32_t>     r_icache_vaddr_save;        // virtual address from processor
-
+    sc_signal<bool>         r_icache_read_state;
     // icache miss handling
     sc_signal<size_t>       r_icache_miss_way;              // selected way for cache update
@@ -420 +420 @@
     sc_signal<int>          r_dcache_fsm_scan_save;     // return state for tlb scan op
     // registers written in P0 stage (used in P1 stage)
-    sc_signal<bool>         r_dcache_wbuf_req;          // WBUF must be written in P1 stage
-    sc_signal<bool>         r_dcache_updt_req;          // DCACHE must be updated in P1 stage
+    sc_signal<uint32_t>     r_dcache_save_wdata;        // write data (from proc)
     sc_signal<uint32_t>     r_dcache_save_vaddr;        // virtual address (from proc)
-    sc_signal<uint32_t>     r_dcache_save_wdata;        // write data (from proc)
     sc_signal<uint32_t>     r_dcache_save_be;           // byte enable (from proc)
     sc_signal<paddr_t>      r_dcache_save_paddr;        // physical address
@@ -549 +547 @@
     sc_signal<bool>         r_dcache_updt_data_req;             
     sc_signal<bool>         r_dcache_updt_dir_req;             
-    sc_signal<bool>         r_dcache_rsp_state;             
     sc_signal<bool>         r_dcache_cas_islocal;            // cas is done locally 
     
@@ -561 +558 @@
 
     //MESI
-    sc_signal<bool>         r_icache_read_state;
     sc_signal<bool>         r_dcache_read_state;
     sc_signal<bool>         r_dcache_read_for_modify;     // a command intent to write
-    sc_signal<bool>         r_dcache_read_hit;            // a command intent to write hit in L1
+    sc_signal<bool>         r_dcache_rsp_state;             
    
      ///////////////////////////////////