Changeset 874 for trunk/platforms/tsar_generic_iob/arch.py

Timestamp:

Nov 11, 2014, 4:07:29 PM (9 years ago)

Author:

alain

Message:

Introducing support for multiple TTY terminals (up to 16 channels) in the tsar_generic_iob platform.

File:

• trunk/platforms/tsar_generic_iob/arch.py (modified) (9 diffs)

trunk/platforms/tsar_generic_iob/arch.py

@@ -19 +19 @@
 #  - y_size         : number of clusters in a column
 #  - nb_procs       : number of processors per cluster
+#  - nb_ttys        : number of TTY channels
 #  - fbf_width      : frame_buffer width = frame_buffer heigth
 #
 #  The "hidden" parameters (defined below) are:
-#  - nb_ttys        : number of TTY channels
 #  - nb_nics        : number of NIC channels
 #  - x_io           : cluster_io x coordinate
@@ -48 +48 @@
           y_size    = 2,
           nb_procs  = 2,
+          nb_ttys   = 1,
           fbf_width = 128 ):
 
     ### define architecture constants
 
-    nb_ttys         = 1
     nb_nics         = 2 
     x_io            = 0
@@ -76 +76 @@
              or (y_size == 8) or (y_size == 16) )
 
-    assert( nb_ttys == 1 )
+    assert( (nb_ttys >= 1) and (nb_ttys <= 16) )
 
     assert( ((x_io == 0) and (y_io == 0)) or
             ((x_io == x_size-1) and (y_io == y_size-1)) )
 
-    platform_name  = 'tsar_iob_%d_%d_%d_%d' % ( x_size, y_size, nb_procs, fbf_width )
+    platform_name  = 'tsar_iob_%d_%d_%d_%d_%d' % (x_size,y_size,nb_procs,nb_ttys,fbf_width)
 
     ### define replicated physical segments
@@ -116 +116 @@
 
     fbf_base  = 0x00B7000000 + offset_io
-    fbf_size  = fbf_width * fbf_width      # fbf_width * fbf_width bytes
+    fbf_size  = fbf_width * fbf_width     # fbf_width * fbf_width bytes
 
     pic_base  = 0x00B8000000 + offset_io
@@ -207 +207 @@
     pic = mapping.addPeriph( 'PIC', base = pic_base, size = pic_size, ptype = 'PIC', channels = 32 )
 
-    mapping.addIrq( pic, index = 0, isrtype = 'ISR_NIC_RX', channel = 0 )
-    mapping.addIrq( pic, index = 1, isrtype = 'ISR_NIC_RX', channel = 1 )
-
-    mapping.addIrq( pic, index = 2, isrtype = 'ISR_NIC_TX', channel = 0 )
-    mapping.addIrq( pic, index = 3, isrtype = 'ISR_NIC_TX', channel = 1 )
-
-    mapping.addIrq( pic, index = 4, isrtype = 'ISR_CMA'   , channel = 0 )
-    mapping.addIrq( pic, index = 5, isrtype = 'ISR_CMA'   , channel = 1 )
-    mapping.addIrq( pic, index = 6, isrtype = 'ISR_CMA'   , channel = 2 )
-    mapping.addIrq( pic, index = 7, isrtype = 'ISR_CMA'   , channel = 3 )
-
-    mapping.addIrq( pic, index = 8, isrtype = 'ISR_BDV'   , channel = 0 )
-
-    mapping.addIrq( pic, index = 9, isrtype = 'ISR_TTY_RX', channel = 0 )
+    mapping.addIrq( pic, index = 0,  isrtype = 'ISR_NIC_RX', channel = 0 )
+    mapping.addIrq( pic, index = 1,  isrtype = 'ISR_NIC_RX', channel = 1 )
+
+    mapping.addIrq( pic, index = 2,  isrtype = 'ISR_NIC_TX', channel = 0 )
+    mapping.addIrq( pic, index = 3,  isrtype = 'ISR_NIC_TX', channel = 1 )
+
+    mapping.addIrq( pic, index = 4,  isrtype = 'ISR_CMA'   , channel = 0 )
+    mapping.addIrq( pic, index = 5,  isrtype = 'ISR_CMA'   , channel = 1 )
+    mapping.addIrq( pic, index = 6,  isrtype = 'ISR_CMA'   , channel = 2 )
+    mapping.addIrq( pic, index = 7,  isrtype = 'ISR_CMA'   , channel = 3 )
+
+    mapping.addIrq( pic, index = 8,  isrtype = 'ISR_BDV'   , channel = 0 )
+
+    mapping.addIrq( pic, index = 16, isrtype = 'ISR_TTY_RX', channel = 0 )
+    mapping.addIrq( pic, index = 17, isrtype = 'ISR_TTY_RX', channel = 1 )
+    mapping.addIrq( pic, index = 18, isrtype = 'ISR_TTY_RX', channel = 2 )
+    mapping.addIrq( pic, index = 19, isrtype = 'ISR_TTY_RX', channel = 3 )
+    mapping.addIrq( pic, index = 20, isrtype = 'ISR_TTY_RX', channel = 4 )
+    mapping.addIrq( pic, index = 21, isrtype = 'ISR_TTY_RX', channel = 5 )
+    mapping.addIrq( pic, index = 22, isrtype = 'ISR_TTY_RX', channel = 6 )
+    mapping.addIrq( pic, index = 23, isrtype = 'ISR_TTY_RX', channel = 7 )
+    mapping.addIrq( pic, index = 24, isrtype = 'ISR_TTY_RX', channel = 8 )
+    mapping.addIrq( pic, index = 25, isrtype = 'ISR_TTY_RX', channel = 9 )
+    mapping.addIrq( pic, index = 26, isrtype = 'ISR_TTY_RX', channel = 10 )
+    mapping.addIrq( pic, index = 27, isrtype = 'ISR_TTY_RX', channel = 11 )
+    mapping.addIrq( pic, index = 28, isrtype = 'ISR_TTY_RX', channel = 12 )
+    mapping.addIrq( pic, index = 29, isrtype = 'ISR_TTY_RX', channel = 13 )
+    mapping.addIrq( pic, index = 30, isrtype = 'ISR_TTY_RX', channel = 14 )
+    mapping.addIrq( pic, index = 31, isrtype = 'ISR_TTY_RX', channel = 15 )
 
     ### hardware components replicated in all clusters
@@ -272 +287 @@
                        identity = True , local = False, big = True )
 
-    ### global vsegs kernel_code, kernel_init : local / big page
-    ### replicated in all clusters with the same name (same vbase)
+    ### Global vsegs kernel_ptab_x_y : big page
+    ### one vseg per cluster: name indexed by (x,y) 
+    ### vbase address incremented by (cluster_xy * vseg_increment)
+    for x in xrange( x_size ):
+        for y in xrange( y_size ):
+            offset = ((x << y_width) + y) * ptab_increment
+            base   = kernel_ptab_vbase + offset
+            mapping.addGlobal( 'seg_kernel_ptab_%d_%d' %(x,y), base, kernel_ptab_size,
+                               'CXW_', vtype = 'PTAB', x = x, y = y, pseg = 'RAM', 
+                               local = False , big = True )
+
+    ### global vsegs kernel_code, kernel_init : big page
+    ### replicated in all clusters with the same name & same vbase
     for x in xrange( x_size ):
         for y in xrange( y_size ):
@@ -286 +312 @@
                                local = True, big = True )
 
-    ### global vseg kernel_data: non local / big page
+    ### global vseg kernel_data : big page
     ### Only mapped in cluster[0][0]
     mapping.addGlobal( 'seg_kernel_data', kernel_data_vbase, kernel_data_size, 
@@ -293 +319 @@
                        local = False, big = True )
 
-    ### global vseg kernel_uncdata: non local / small page
+    ### global vseg kernel_uncdata : small page
     ### Only mapped in cluster[0][0]
     mapping.addGlobal( 'seg_kernel_uncdata', kernel_uncdata_vbase, kernel_uncdata_size,
@@ -300 +326 @@
                        local = False, big = False )
 
-    ### Global vsegs kernel_ptab_x_y: non local / big pages
-    ### replicated in all clusters with name indexed by (x,y) 
-    ### as vbase address is incremented by (cluster_xy * vseg_increment)
-    for x in xrange( x_size ):
-        for y in xrange( y_size ):
-            offset = ((x << y_width) + y) * ptab_increment
-            mapping.addGlobal( 'seg_kernel_ptab_%d_%d' %(x,y), kernel_ptab_vbase + offset , kernel_ptab_size,
-                               'CXW_', vtype = 'PTAB', x = x, y = y, pseg = 'RAM', 
-                               local = False , big = True )
-
-    ### global vsegs kernel_sched : non local / small pages 
-    ### allocated in all clusters with name indexed by (x,y) 
+    ### global vsegs kernel_sched_x_y : small pages 
+    ### one vseg per cluster with name indexed by (x,y) 
     ### as vbase address is incremented by (cluster_xy * vseg_increment)
     for x in xrange( x_size ):