Changeset 90 for trunk/modules/vci_cc_xcache_wrapper_v4/caba/source/src
- Timestamp:
- Sep 13, 2010, 5:17:41 PM (14 years ago)
- File:
-
- 1 edited
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trunk/modules/vci_cc_xcache_wrapper_v4/caba/source/src/vci_cc_xcache_wrapper_v4.cpp
r83 r90 64 64 namespace caba { 65 65 66 #if DEBUG_CC_XCACHE_WRAPPER67 66 namespace { 68 67 const char *dcache_fsm_state_str[] = { … … 126 125 }; 127 126 } 128 #endif129 127 130 128 #define tmpl(...) template<typename vci_param, typename iss_t> __VA_ARGS__ VciCcXCacheWrapperV4<vci_param, iss_t> … … 134 132 ///////////////////////////////// 135 133 tmpl(/**/)::VciCcXCacheWrapperV4( 136 134 ///////////////////////////////// 137 135 sc_module_name name, 138 136 int proc_id, … … 248 246 /////////////////////////////////// 249 247 tmpl(/**/)::~VciCcXCacheWrapperV4() 250 248 /////////////////////////////////// 251 249 { 252 250 delete [] r_icache_miss_buf; … … 258 256 //////////////////////// 259 257 tmpl(void)::print_cpi() 260 258 //////////////////////// 261 259 { 262 260 std::cout << "CPU " << m_srcid_rw << " : CPI = " … … 265 263 //////////////////////// 266 264 tmpl(void)::print_stats() 267 265 //////////////////////// 268 266 { 269 267 float run_cycles = (float)(m_cpt_total_cycles - m_cpt_frz_cycles); … … 287 285 std::cout << "- WRITE LENGTH = " << (float)m_length_write_transaction/m_cpt_write_transaction << std::endl; 288 286 } 289 287 ///////////////////////// 288 tmpl(void)::print_trace() 289 ///////////////////////// 290 { 291 typename iss_t::InstructionRequest ireq; 292 typename iss_t::DataRequest dreq; 293 m_iss.getRequests( ireq, dreq ); 294 295 std::cout << std::dec << "CC_XCACHE_WRAPPER " << m_srcid_rw << std::endl; 296 std::cout << " cache state : " << icache_fsm_state_str[r_icache_fsm] << " / " 297 << dcache_fsm_state_str[r_dcache_fsm] << " / " 298 << cmd_fsm_state_str[r_vci_cmd_fsm] << " / " 299 << rsp_fsm_state_str[r_vci_rsp_fsm] << " / " 300 << tgt_fsm_state_str[r_vci_tgt_fsm] << std::endl; 301 std::cout << " proc state : PC = " << ireq.addr << " / AD = " << dreq.addr 302 << " / V = " << dreq.valid << " TYPE = " << dreq.type << std::endl; 303 } 290 304 ////////////////////////// 291 305 tmpl(void)::transition() 292 306 ////////////////////////// 293 307 { 294 308 if ( ! p_resetn.read() ) { … … 1644 1658 ////////////////////////////////////////////////////////////////////////////////// 1645 1659 tmpl(void)::genMoore() 1646 1660 ////////////////////////////////////////////////////////////////////////////////// 1647 1661 { 1648 1662 // VCI initiator response
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