Changeset 146 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/src/test.cpp

Timestamp:

Feb 1, 2011, 9:57:54 PM (13 years ago)

Author:

rosiere

Message:

1) Integration of RegisterFile_Internal_Banked in RegisterFile?
2) Erase "read_write" interface in RegisterFile_Monolithic component
3) Add smith predictor parameters in Load_store_pointer_unit.
4) Fix not statistics flags

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/src/test.cpp (modified) (9 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/src/test.cpp

@@ -73 +73 @@
   sc_signal<Tdata_t>                       WRITE_DATA    [_param->_nb_port_write];
 
-  sc_signal<Tcontrol_t>                    READ_WRITE_VAL     [_param->_nb_port_read_write];
-  sc_signal<Tcontrol_t>                    READ_WRITE_ACK     [_param->_nb_port_read_write];
-  sc_signal<Tcontrol_t>                    READ_WRITE_RW      [_param->_nb_port_read_write];
-  sc_signal<Taddress_t>                    READ_WRITE_ADDRESS [_param->_nb_port_read_write];
-  sc_signal<Tdata_t>                       READ_WRITE_RDATA   [_param->_nb_port_read_write];
-  sc_signal<Tdata_t>                       READ_WRITE_WDATA   [_param->_nb_port_read_write];
-
   /********************************************************
    * Instanciation
@@ -105 +98 @@
       (*(registerfile-> in_WRITE_DATA    [i]))        (WRITE_DATA    [i]);
     }
-  for (uint32_t i=0; i<_param->_nb_port_read_write; i++)
-    {
-      (*(registerfile-> in_READ_WRITE_VAL     [i])) (READ_WRITE_VAL      [i]);
-      (*(registerfile->out_READ_WRITE_ACK     [i])) (READ_WRITE_ACK      [i]);
-      (*(registerfile-> in_READ_WRITE_RW      [i])) (READ_WRITE_RW       [i]);
-      if (_param->_have_port_address)
-      (*(registerfile-> in_READ_WRITE_ADDRESS [i])) (READ_WRITE_ADDRESS  [i]);
-      (*(registerfile-> in_READ_WRITE_WDATA   [i])) (READ_WRITE_WDATA    [i]);
-      (*(registerfile->out_READ_WRITE_RDATA   [i])) (READ_WRITE_RDATA    [i]);
-    }
   
   cout << "<" << name << "> Start Simulation ............" << endl;
@@ -131 +114 @@
   for (uint32_t i=0; i<_param->_nb_port_read; i++)
     READ_VAL  [i] .write (0);
-  for (uint32_t i=0; i<_param->_nb_port_read_write; i++)
-    READ_WRITE_VAL  [i] .write (0);
 
   NRESET.write(0);
@@ -144 +125 @@
   for (uint32_t i=0; i<_param->_nb_port_read; i++)
     TEST(Tcontrol_t,READ_ACK  [i],1);
-  for (uint32_t i=0; i<_param->_nb_port_read_write; i++)
-    TEST(Tcontrol_t,READ_WRITE_ACK  [i],1);
 
   for (uint32_t nb_iteration=0; nb_iteration < NB_ITERATION; nb_iteration ++)
@@ -187 +166 @@
             }
 
-          for (uint32_t num_port=0; num_port < _param->_nb_port_read_write; num_port ++)
-            {
-              if ((address_next < _param->_nb_word) and
-                  (READ_WRITE_VAL [num_port].read() == 0))
-                {
-                  cout << "(" << num_port << ") [" << address_next << "] <= " << tab[address_next] << endl;
-                  
-                  READ_WRITE_VAL     [num_port] .write(1);
-                  READ_WRITE_RW      [num_port] .write(RW_WRITE);
-                  READ_WRITE_WDATA   [num_port] .write(tab[address_next]);
-                  READ_WRITE_ADDRESS [num_port] .write(address_next++);
-                  
-                  // Address can be not a multiple of nb_port_write
-                  if (address_next >= _param->_nb_word)
-                    break;
-                }
-            }
-          
           SC_START(1);
 
@@ -217 +178 @@
                 }
             }
-          // reset write_val port
-          for (uint32_t num_port=0; num_port < _param->_nb_port_read_write; num_port ++)
-            {
-              if ((READ_WRITE_ACK [num_port].read() == 1) and
-                  (READ_WRITE_VAL [num_port].read() == 1))
-                {
-                  READ_WRITE_VAL  [num_port] .write(0);
-                  nb_ack ++;
-                }
-            }
 
 //        SC_START(0);
@@ -237 +188 @@
       
       Tdata_t read_address       [_param->_nb_port_read];
-      Tdata_t read_write_address [_param->_nb_port_read_write];
 
       while (nb_ack < _param->_nb_word)
@@ -258 +208 @@
             }
 
-          for (uint32_t num_port=0; num_port < _param->_nb_port_read_write; num_port ++)
-            {
-              if ((address_next < _param->_nb_word) and
-                  (READ_WRITE_VAL [num_port].read() == 0))
-                {
-                  read_write_address [num_port] = address_next++;
-
-                  READ_WRITE_VAL     [num_port].write(1);
-                  READ_WRITE_RW      [num_port].write(RW_READ);
-                  READ_WRITE_ADDRESS [num_port].write(read_write_address [num_port]);
-
-                  if (address_next >= _param->_nb_word)
-                    break;
-                }
-            }
-
 
           SC_START(1);
@@ -288 +222 @@
 
                   TEST(Tdata_t,READ_DATA [num_port].read(), tab[read_address [num_port]]);
-                  nb_ack ++;
-                }
-            }
-
-          for (uint32_t num_port=0; num_port < _param->_nb_port_read_write; num_port ++)
-            {
-              if ((READ_WRITE_ACK [num_port].read() == 1) and
-                  (READ_WRITE_VAL [num_port].read() == 1))
-                {
-                  READ_WRITE_VAL  [num_port] .write(0);
-
-                  cout << "(" << num_port << ") [" << read_write_address [num_port] << "] => " << READ_WRITE_RDATA [num_port].read() << endl;
-
-                  TEST(Tdata_t,READ_WRITE_RDATA [num_port].read(), tab[read_write_address [num_port]]);
                   nb_ack ++;
                 }