Changeset 204 for trunk/modules/vci_cc_vcache_wrapper_v4/caba/source/include/vci_cc_vcache_wrapper_v4.h

Timestamp:

Mar 8, 2012, 8:48:53 AM (12 years ago)

Author:

alain

Message:

bugs fix

File:

• trunk/modules/vci_cc_vcache_wrapper_v4/caba/source/include/vci_cc_vcache_wrapper_v4.h (modified) (9 diffs)

trunk/modules/vci_cc_vcache_wrapper_v4/caba/source/include/vci_cc_vcache_wrapper_v4.h

@@ -35 +35 @@
 #include "generic_fifo.h"
 #include "generic_tlb.h"
+#include "generic_cache.h"
 #include "generic_cam.h"
-#include "generic_cache.h"
 #include "vci_initiator.h"
 #include "vci_target.h"
@@ -113 +113 @@
         DCACHE_XTN_DC_INVAL_VA,        
         DCACHE_XTN_DC_INVAL_PA,     
-        DCACHE_XTN_DC_INVAL_WAIT,
+        DCACHE_XTN_DC_INVAL_END,
         DCACHE_XTN_DC_INVAL_GO,          
         DCACHE_XTN_DT_INVAL,          
@@ -121 +121 @@
         DCACHE_WRITE_SC_WAIT,           
         DCACHE_WRITE_UNC_WAIT,
-        // handling processor miss requests
+            // handling processor miss requests
         DCACHE_MISS_VICTIM,
         DCACHE_MISS_INVAL,
@@ -133 +133 @@
         DCACHE_CC_INVAL,            
         DCACHE_CC_UPDT,             
-        DCACHE_CC_WAIT,             
+        // handling TLB inval (after a coherence or XTN request)
+        DCACHE_INVAL_TLB_SCAN,             
     };
 
@@ -173 +174 @@
         TGT_RSP_ICACHE, 
         TGT_RSP_DCACHE,
-    };
-
-    enum inval_itlb_fsm_state_e {
-        INVAL_ITLB_IDLE,
-        INVAL_ITLB_SCAN,
-    };
-
-    enum inval_dtlb_fsm_state_e {
-        INVAL_DTLB_IDLE,
-        INVAL_DTLB_SCAN,
     };
 
@@ -386 +377 @@
     sc_signal<size_t>       r_dcache_p1_tlb_set;            // selected set (from dtlb)
     sc_signal<paddr_t>      r_dcache_p1_tlb_nline;          // nline value (from dtlb) 
-    // registers written in P2 stage (used in P3 stage)
+    sc_signal<bool>         r_dcache_p1_tlb_big;        // big page bit (from dtlb)
+    // registers written in P2 stage (used in long write)
     sc_signal<uint32_t>     r_dcache_p2_vaddr;          // virtual address (from proc)
     sc_signal<size_t>       r_dcache_p2_tlb_way;            // selected way in dtlb 
@@ -395 +387 @@
     sc_signal<size_t>       r_dcache_p2_pte_set;            // selected set in dcache
     sc_signal<size_t>       r_dcache_p2_pte_word;           // selected word in dcache
-    sc_signal<size_t>       r_dcache_p2_pte_flags;          // pte value read in dcache
+    sc_signal<size_t>       r_dcache_p2_pte;            // pte value read in dcache
     
     // communication between DCACHE FSM and VCI_CMD FSM
@@ -445 +437 @@
     sc_signal<paddr_t>      r_dcache_ll_vaddr;              // LL reserved address 
                             
-    // communication between DCACHE FSM and INVAL_ITLB/INVAL_DTLB FSMs
-    sc_signal<bool>         r_dcache_itlb_inval_req;    // inval request of one or several TLB entries
-    sc_signal<bool>         r_dcache_dtlb_inval_req;    // inval request of one or several TLB entries;
+    // ITLB and DTLB invalidation
+    sc_signal<bool>         r_dcache_itlb_inval_req;    // inval request for itlb
+    sc_signal<bool>         r_dcache_dtlb_inval_req;    // inval request for dtlb
     sc_signal<paddr_t>      r_dcache_tlb_inval_line;    // line index 
+    sc_signal<size_t>       r_dcache_tlb_inval_count;   // tlb entry counter
 
     // communication between DCACHE FSM and ICACHE FSM
@@ -510 +503 @@
     uint32_t                *r_tgt_buf;                         // cache line word buffer 
     vci_be_t                *r_tgt_be;                          // cache line be buffer 
-
-    ///////////////////////////////////
-    // INVAL_ITLB FSM REGISTERS
-    ///////////////////////////////////
-    sc_signal<int>          r_inval_itlb_fsm;               // state register
-    sc_signal<size_t>       r_inval_itlb_count;             // counter to scan all itlb entries
-
-    ///////////////////////////////////
-    // INVAL_DTLB FSM REGISTERS
-    ///////////////////////////////////
-    sc_signal<int>          r_inval_dtlb_fsm;               //state register
-    sc_signal<size_t>       r_inval_dtlb_count;             // counter to scan all dtlb entries
 
     //////////////////////////////////////////////////////////////////