Ignore:
Timestamp:
Jul 24, 2013, 8:47:40 AM (11 years ago)
Author:
cfuguet
Message:


Merging vci_mem_cache from branches/v5 to trunk [441-467]

=-----------------------------------------------------------------------
r441 | cfuguet | 2013-07-17 10:54:07 +0200 (Wed, 17 Jul 2013) | 14 lines

Modifications in branches/v5/vci_mem_cache:

  • Changing name of CC DSPIN ports: + p_dspin_in => p_dspin_p2m + p_dspin_out => p_dspin_m2p
  • Splitting the Update Table in two tables: + UPT (Update Table): Stores the MULTI-UPDATE transactions + IVT (Invalidate Table): Stores the MULTI/BROADCAST INVALIDATE

transactions

Each table has its own allocator FSM: r_alloc_upt and r_alloc_ivt

=-----------------------------------------------------------------------
r442 | cfuguet | 2013-07-17 12:13:51 +0200 (Wed, 17 Jul 2013) | 13 lines

Modifications in branches/v5/modules/vci_mem_cache:

  • Introducing third port for the CLACK network.
  • CLEANUP FSM is no more a CC_SEND FSM client.
  • CLEANUP FSM controls directly the p_dspin_clack port

=-----------------------------------------------------------------------
r445 | cfuguet | 2013-07-18 10:49:36 +0200 (Thu, 18 Jul 2013) | 7 lines

Bugfix in vci_mem_cache:

  • Adding missing "strings" for print_trace() function
  • Adding alloc_ivt fsm (Invalidate Table) in the

print_trace() function

=-----------------------------------------------------------------------
r455 | cfuguet | 2013-07-19 10:16:17 +0200 (Fri, 19 Jul 2013) | 8 lines

Merged

/trunk/modules/vci_mem_cache:449 with
/branches/v5/modules/vci_mem_cache:446.

This merge introduces into the branch the last modifications concerning
the VCI memory cache configuration interface


Merging vci_cc_vcache_wrapper from branches/v5 to trunk [444-467]

=-----------------------------------------------------------------------
r444 | cfuguet | 2013-07-17 14:46:46 +0200 (Wed, 17 Jul 2013) | 7 lines

Modifications in branches/v5/modules/vci_cc_vcache_wrapper:

  • Renaming FROM_MC DSPIN flits fields in M2P
  • Renaming FROM_L1 DSPIN flits fields in P2M
  • Renaming CLEANUP_ACK DSPIN flits fields in CLACK

=-----------------------------------------------------------------------
r446 | cfuguet | 2013-07-18 11:37:47 +0200 (Thu, 18 Jul 2013) | 13 lines

Modifications in vci_cc_vcache_wrapper:

  • Merging the states DCACHE/ICACHE_CC_BROADCAST and DCACHE/ICACHE_CC_INVAL. This is because, the BROADCAST INVALIDATE and the MULTICAST INVALIDATE are both acknowledged by a CLEANUP.
  • Adding third port for the clack coherence network.
  • Renaming the port dspin_in to dspin_m2p and the port dspin_out to dspin_p2m

=-----------------------------------------------------------------------
r454 | haoliu | 2013-07-19 10:15:13 +0200 (Fri, 19 Jul 2013) | 2 lines

modified CC_RECEIVE FSM and CC_CHECK FSM (icache and dcache) for new
version V5

=-----------------------------------------------------------------------
r461 | cfuguet | 2013-07-19 15:49:43 +0200 (Fri, 19 Jul 2013) | 9 lines

Bugfix in vci_cc_vcache_wrapper:

  • In the states DCACHE/ICACHE CC_UPDT the FSM returns to the state CC_CHECK only when the cc_send_req is occupied.

We must not return to the CC_CHECK state if not ROK of the
DATA FIFO because the counter word counter will be reset.

=-----------------------------------------------------------------------
r462 | cfuguet | 2013-07-19 16:26:26 +0200 (Fri, 19 Jul 2013) | 8 lines

Modification in vci_cc_vcache_wrapper:

  • Optimization in DCACHE/ICACHE CC_CHECK state. We can handle a CLACK and a CC request if the latter does a MISS match. This is because the CC request doing MISS match does not need to access the directory

=-----------------------------------------------------------------------
r463 | cfuguet | 2013-07-19 16:52:06 +0200 (Fri, 19 Jul 2013) | 12 lines

Modification in vci_cc_vcache_wrapper:

  • Optimization in DCACHE/ICACHE CC_CHECK state. If pending request to CC_SEND, we wait in the CC_CHECK state. Doing this, during the wait, we can handle incoming CLACK avoiding any deadlock situation.

The states CC_UPDT and CC_INVAL do not need to test anymore if
there is a pending request to CC_SEND.


Merging tsar_generic_xbar from branches/v5 to trunk [447-467]

=-----------------------------------------------------------------------
r447 | cfuguet | 2013-07-18 16:12:05 +0200 (Thu, 18 Jul 2013) | 8 lines

Adding tsar_generic_xbar platform in branches/v5/platforms:

  • This platform contains a third local crossbar interconnect for the CLACK network.
  • It works only in a monocluster topology

=-----------------------------------------------------------------------
r448 | cfuguet | 2013-07-18 17:51:18 +0200 (Thu, 18 Jul 2013) | 9 lines

Modification in branches/v5/platforms/tsar_generic_xbar:

  • Adding a DSPIN router to the platform to allow the inter-cluster communication for the CLACK commands.

With this modification, the tsar_generic_xbar platform can be used
for multi-cluster simulations

=-----------------------------------------------------------------------
r466 | cfuguet | 2013-07-23 17:01:49 +0200 (Tue, 23 Jul 2013) | 9 lines

Modifications in branches/v5 vci_mem_cache:

  • Replacing the third router CLACK by a third virtual channel in the new virtual_dspin_router supporting several virtual channels.

The third channel has been added in the COMMAND router.

=-----------------------------------------------------------------------
r467 | cfuguet | 2013-07-23 17:23:13 +0200 (Tue, 23 Jul 2013) | 5 lines

Modifications in branches/v5 tsar_generic_xbar:

  • Adding preprocessor conditional statements for ALMOS support


Merging dspin_dhccp_param from branches/v5 to trunk [377-467]

=-----------------------------------------------------------------------
r442 | cfuguet | 2013-07-17 12:13:51 +0200 (Wed, 17 Jul 2013) | 13 lines

Modifications in branches/v5/communication/dspin_dhccp_param:

  • Renaming FROM_MC fields in M2P
  • Renaming FROM_L1 fields in P2M
  • Renaming CLEANUP_ACK fields in CLACK
Location:
trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba
Files:
3 edited

Legend:

Unmodified
Added
Removed

  • trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/metadata/tsar_iob_cluster.sd

    r450 r468  
    108108                Port('caba:clock_in', 'p_clk', auto = 'clock'),
    109109
    110                 Port('caba:dspin_output', 'p_int_cmd_out', [2, 4],
     110                Port('caba:dspin_output', 'p_int_cmd_out', [4, 3],
    111111              dspin_data_size = parameter.Reference('dspin_int_cmd_width')),
    112                 Port('caba:dspin_input', 'p_int_cmd_in', [2, 4],
     112                Port('caba:dspin_input', 'p_int_cmd_in', [4, 3],
    113113              dspin_data_size = parameter.Reference('dspin_int_cmd_width')),
    114                 Port('caba:dspin_output', 'p_int_rsp_out', [2, 4],
     114                Port('caba:dspin_output', 'p_int_rsp_out', [4, 2],
    115115              dspin_data_size = parameter.Reference('dspin_int_rsp_width')),
    116                 Port('caba:dspin_input', 'p_int_rsp_in', [2, 4],
     116                Port('caba:dspin_input', 'p_int_rsp_in', [4, 2],
    117117              dspin_data_size = parameter.Reference('dspin_int_rsp_width')),
    118118
    119                 Port('caba:dspin_output', 'p_ext_cmd_out', [2, 4],
     119                Port('caba:dspin_output', 'p_ram_cmd_out', [4],
    120120              dspin_data_size = parameter.Reference('dspin_ram_cmd_width')),
    121                 Port('caba:dspin_input', 'p_ext_cmd_in', [2, 4],
     121                Port('caba:dspin_input', 'p_ram_cmd_in', [4],
    122122              dspin_data_size = parameter.Reference('dspin_ram_cmd_width')),
    123                 Port('caba:dspin_output', 'p_ext_rsp_out', [2, 4],
     123                Port('caba:dspin_output', 'p_ram_rsp_out', [4],
    124124              dspin_data_size = parameter.Reference('dspin_ram_rsp_width')),
    125                 Port('caba:dspin_input', 'p_ext_rsp_in', [2, 4],
     125                Port('caba:dspin_input', 'p_ram_rsp_in', [4],
    126126              dspin_data_size = parameter.Reference('dspin_ram_rsp_width')),
    127127                ],

  • trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h

    r450 r468  
    7777        DspinSignals<dspin_int_cmd_width>     signal_int_dspin_m2p_l2g_c;
    7878        DspinSignals<dspin_int_cmd_width>     signal_int_dspin_m2p_g2l_c;
     79        DspinSignals<dspin_int_cmd_width>     signal_int_dspin_clack_l2g_c;
     80        DspinSignals<dspin_int_cmd_width>     signal_int_dspin_clack_g2l_c;
    7981        DspinSignals<dspin_int_rsp_width>     signal_int_dspin_rsp_l2g_d;
    8082        DspinSignals<dspin_int_rsp_width>     signal_int_dspin_rsp_g2l_d;
    … …  
    111113        // Coherence DSPIN signals between DSPIN local crossbars and CC components
    112114        DspinSignals<dspin_int_cmd_width>     signal_int_dspin_m2p_memc;
     115        DspinSignals<dspin_int_cmd_width>     signal_int_dspin_clack_memc;
    113116        DspinSignals<dspin_int_rsp_width>     signal_int_dspin_p2m_memc;
    114117        DspinSignals<dspin_int_cmd_width>     signal_int_dspin_m2p_proc[8];
     118        DspinSignals<dspin_int_cmd_width>     signal_int_dspin_clack_proc[8];
    115119        DspinSignals<dspin_int_rsp_width>     signal_int_dspin_p2m_proc[8];
    116120
    … …  
    179183    DspinLocalCrossbar<dspin_int_cmd_width>*          int_xbar_m2p_c;
    180184    DspinLocalCrossbar<dspin_int_rsp_width>*          int_xbar_p2m_c;
     185    DspinLocalCrossbar<dspin_int_cmd_width>*          int_xbar_clack_c;
    181186
    182187    VirtualDspinRouter<dspin_int_cmd_width>*          int_router_cmd;

  • trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp

    r450 r468  
    8989
    9090    // Vectors of DSPIN ports for inter-cluster communications
    91     p_dspin_int_cmd_in  = alloc_elems<DspinInput<dspin_int_cmd_width> >("p_int_cmd_in", 2, 4);
    92     p_dspin_int_cmd_out = alloc_elems<DspinOutput<dspin_int_cmd_width> >("p_int_cmd_out", 2, 4);
    93     p_dspin_int_rsp_in  = alloc_elems<DspinInput<dspin_int_rsp_width> >("p_int_rsp_in", 2, 4);
    94     p_dspin_int_rsp_out = alloc_elems<DspinOutput<dspin_int_rsp_width> >("p_int_rsp_out", 2, 4);
     91    p_dspin_int_cmd_in  = alloc_elems<DspinInput<dspin_int_cmd_width> >("p_int_cmd_in", 4, 3);
     92    p_dspin_int_cmd_out = alloc_elems<DspinOutput<dspin_int_cmd_width> >("p_int_cmd_out", 4, 3);
     93    p_dspin_int_rsp_in  = alloc_elems<DspinInput<dspin_int_rsp_width> >("p_int_rsp_in", 4, 2);
     94    p_dspin_int_rsp_out = alloc_elems<DspinOutput<dspin_int_rsp_width> >("p_int_rsp_out", 4, 2);
    9595
    9696    p_dspin_ram_cmd_in  = alloc_elems<DspinInput<dspin_ram_cmd_width> >("p_ext_cmd_in", 4);
    … …  
    171171                     8,                                  // TRANSACTION TABLE DEPTH
    172172                     8,                                  // UPDATE TABLE DEPTH
     173                     8,                                  // INVALIDATE TABLE DEPTH
    173174                     debug_start_cycle,
    174175                     memc_debug_ok );
    … …  
    303304                     false );                      // no broacast
    304305
     306    std::ostringstream s_int_xbar_clack_c;
     307    s_int_xbar_clack_c << "int_xbar_clack_c_" << x_id << "_" << y_id;
     308    int_xbar_clack_c = new DspinLocalCrossbar<dspin_int_cmd_width>(
     309                     s_int_xbar_clack_c.str().c_str(),
     310                     mt_int,                       // mapping table
     311                     x_id, y_id,                   // cluster coordinates
     312                     x_width, y_width, l_width,
     313                     1,                            // number of local sources
     314                     nb_procs,                     // number of local targets
     315                     1, 1,                         // fifo depths
     316                     true,                         // CMD
     317                     false,                        // don't use local routing table
     318                     false);                       // broadcast
     319
    305320    //////////////  INT ROUTER(S)
    306321    std::ostringstream s_int_router_cmd;
    … …  
    310325                     x_id,y_id,                    // coordinate in the mesh
    311326                     x_width, y_width,             // x & y fields width
     327                     3,                            // nb virtual channels
    312328                     4,4);                         // input & output fifo depths
    313329
    … …  
    318334                     x_id,y_id,                    // coordinates in mesh
    319335                     x_width, y_width,             // x & y fields width
     336                     2,                            // nb virtual channels
    320337                     4,4);                         // input & output fifo depths
    321338
    … …  
    459476    int_router_rsp->p_clk                        (this->p_clk);
    460477    int_router_rsp->p_resetn                     (this->p_resetn);
    461     for (int x = 0; x < 2; x++)
    462     {
    463         for(int y = 0; y < 4; y++)
     478
     479    for (int i = 0; i < 4; i++)
     480    {
     481        for(int k = 0; k < 3; k++)
    464482        {
    465             int_router_cmd->p_out[x][y]          (this->p_dspin_int_cmd_out[x][y]);
    466             int_router_cmd->p_in[x][y]           (this->p_dspin_int_cmd_in[x][y]);
    467             int_router_rsp->p_out[x][y]          (this->p_dspin_int_rsp_out[x][y]);
    468             int_router_rsp->p_in[x][y]           (this->p_dspin_int_rsp_in[x][y]);
     483            int_router_cmd->p_out[i][k]          (this->p_dspin_int_cmd_out[i][k]);
     484            int_router_cmd->p_in[i][k]           (this->p_dspin_int_cmd_in[i][k]);
    469485        }
     486
     487        for(int k = 0; k < 2; k++)
     488        {
     489            int_router_rsp->p_out[i][k]          (this->p_dspin_int_rsp_out[i][k]);
     490            int_router_rsp->p_in[i][k]           (this->p_dspin_int_rsp_in[i][k]);
     491        }
    470492    }
    471493
    472494    // local ports
    473     int_router_cmd->p_out[0][4]                  (signal_int_dspin_cmd_g2l_d);
    474     int_router_cmd->p_out[1][4]                  (signal_int_dspin_m2p_g2l_c);
    475     int_router_cmd->p_in[0][4]                   (signal_int_dspin_cmd_l2g_d);
    476     int_router_cmd->p_in[1][4]                   (signal_int_dspin_m2p_l2g_c);
     495    int_router_cmd->p_out[4][0]                  (signal_int_dspin_cmd_g2l_d);
     496    int_router_cmd->p_out[4][1]                  (signal_int_dspin_m2p_g2l_c);
     497    int_router_cmd->p_out[4][2]                  (signal_int_dspin_clack_g2l_c);
     498    int_router_cmd->p_in[4][0]                   (signal_int_dspin_cmd_l2g_d);
     499    int_router_cmd->p_in[4][1]                   (signal_int_dspin_m2p_l2g_c);
     500    int_router_cmd->p_in[4][2]                   (signal_int_dspin_clack_l2g_c);
    477501   
    478     int_router_rsp->p_out[0][4]                  (signal_int_dspin_rsp_g2l_d);
    479     int_router_rsp->p_out[1][4]                  (signal_int_dspin_p2m_g2l_c);
    480     int_router_rsp->p_in[0][4]                   (signal_int_dspin_rsp_l2g_d);
    481     int_router_rsp->p_in[1][4]                   (signal_int_dspin_p2m_l2g_c);
     502    int_router_rsp->p_out[4][0]                  (signal_int_dspin_rsp_g2l_d);
     503    int_router_rsp->p_out[4][1]                  (signal_int_dspin_p2m_g2l_c);
     504    int_router_rsp->p_in[4][0]                   (signal_int_dspin_rsp_l2g_d);
     505    int_router_rsp->p_in[4][1]                   (signal_int_dspin_p2m_l2g_c);
    482506
    483507    ///////////////////// CMD DSPIN  local crossbar direct
    … …  
    541565        int_xbar_p2m_c->p_local_in[p]            (signal_int_dspin_p2m_proc[p]);
    542566
     567    ////////////////////// CLACK DSPIN local crossbar coherence
     568    int_xbar_clack_c->p_clk                      (this->p_clk);
     569    int_xbar_clack_c->p_resetn                   (this->p_resetn);
     570    int_xbar_clack_c->p_global_out               (signal_int_dspin_clack_l2g_c);
     571    int_xbar_clack_c->p_global_in                (signal_int_dspin_clack_g2l_c);
     572    int_xbar_clack_c->p_local_in[0]              (signal_int_dspin_clack_memc);
     573    for (size_t p = 0; p < nb_procs; p++)
     574        int_xbar_clack_c->p_local_out[p]         (signal_int_dspin_clack_proc[p]);
     575
    543576    //////////////////////////////////// Processors
    544577    for (size_t p = 0; p < nb_procs; p++)
    … …  
    547580        proc[p]->p_resetn                        (this->p_resetn);
    548581        proc[p]->p_vci                           (signal_int_vci_ini_proc[p]);
    549         proc[p]->p_dspin_in                      (signal_int_dspin_m2p_proc[p]);
    550         proc[p]->p_dspin_out                     (signal_int_dspin_p2m_proc[p]);
     582        proc[p]->p_dspin_m2p                     (signal_int_dspin_m2p_proc[p]);
     583        proc[p]->p_dspin_p2m                     (signal_int_dspin_p2m_proc[p]);
     584        proc[p]->p_dspin_clack                   (signal_int_dspin_clack_proc[p]);
    551585        proc[p]->p_irq[0]                        (signal_proc_it[p]);
    552586        for ( size_t j = 1 ; j < 6 ; j++)
    … …  
    563597
    564598    ///////////////////////////////////// XICU
    565     xicu->p_clk                                   (this->p_clk);
    566     xicu->p_resetn                                (this->p_resetn);
    567     xicu->p_vci                                   (signal_int_vci_tgt_xicu);
     599    xicu->p_clk                                  (this->p_clk);
     600    xicu->p_resetn                               (this->p_resetn);
     601    xicu->p_vci                                  (signal_int_vci_tgt_xicu);
    568602    for ( size_t p=0 ; p<nb_procs ; p++)
    569603    {
    570         xicu->p_irq[p]                            (signal_proc_it[p]);
     604        xicu->p_irq[p]                           (signal_proc_it[p]);
    571605    }
    572606    for ( size_t i=0 ; i<4 ; i++)
    … …  
    590624
    591625    ///////////////////////////////////// MEMC
    592     memc->p_clk                                   (this->p_clk);
    593     memc->p_resetn                                (this->p_resetn);
    594     memc->p_vci_ixr                               (signal_ram_vci_ini_memc);
    595     memc->p_vci_tgt                               (signal_int_vci_tgt_memc);
    596     memc->p_dspin_in                             (signal_int_dspin_p2m_memc);
    597     memc->p_dspin_out                           (signal_int_dspin_m2p_memc);
     626    memc->p_clk                                  (this->p_clk);
     627    memc->p_resetn                               (this->p_resetn);
     628    memc->p_vci_ixr                              (signal_ram_vci_ini_memc);
     629    memc->p_vci_tgt                              (signal_int_vci_tgt_memc);
     630    memc->p_dspin_p2m                            (signal_int_dspin_p2m_memc);
     631    memc->p_dspin_m2p                            (signal_int_dspin_m2p_memc);
     632    memc->p_dspin_clack                          (signal_int_dspin_clack_memc);
    598633
    599634    // wrapper to INT network
    … …  
    612647
    613648    //////////////////////////////////// XRAM
    614     xram->p_clk                                   (this->p_clk);
    615     xram->p_resetn                                (this->p_resetn);
    616     xram->p_vci                                         (signal_ram_vci_tgt_xram);
     649    xram->p_clk                                  (this->p_clk);
     650    xram->p_resetn                               (this->p_resetn);
     651    xram->p_vci                                  (signal_ram_vci_tgt_xram);
    617652
    618653    // wrapper to RAM network
    … …  
    624659
    625660    /////////////////////////////////// MDMA
    626     mdma->p_clk                                   (this->p_clk);
     661    mdma->p_clk                                  (this->p_clk);
    627662    mdma->p_resetn                               (this->p_resetn);
    628     mdma->p_vci_target                            (signal_int_vci_tgt_mdma);
    629     mdma->p_vci_initiator                         (signal_int_vci_ini_mdma);
     663    mdma->p_vci_target                           (signal_int_vci_tgt_mdma);
     664    mdma->p_vci_initiator                        (signal_int_vci_ini_mdma);
    630665    for (size_t i=0 ; i<nb_dmas ; i++)
    631666        mdma->p_irq[i]                           (signal_irq_mdma[i]);
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