Changeset 88 for trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/include/vci_cc_vcache_wrapper2_v1.h

Timestamp:

Sep 6, 2010, 1:57:15 PM (14 years ago)

Author:

gao

Message:

Correction of itlb access bit set and dtlb dirty bit set

File:

• trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/include/vci_cc_vcache_wrapper2_v1.h (modified) (1 diff)

trunk/modules/vci_cc_vcache_wrapper2_v1/caba/source/include/vci_cc_vcache_wrapper2_v1.h

@@ -350 +350 @@
     sc_signal<bool>             r_itlb_k_read_dcache;       // used for instruction tlb miss, request in data cache
     sc_signal<bool>             r_itlb_acc_dcache_req;      // used for itlb update access bit via dcache
+    sc_signal<bool>             r_itlb_acc_redo_req;        // used for itlb update access bit via dcache
     sc_signal<bool>             r_dcache_rsp_itlb_error;    // used for data cache rsp error when itlb miss
     sc_signal<data_t>       r_dcache_rsp_itlb_miss;         // used for dcache rsp data when itlb miss