- Timestamp:
- Mar 27, 2008, 11:04:49 AM (16 years ago)
- Location:
- trunk
- Files:
-
- 1249 added
- 3 deleted
- 196 edited
- 7 moved
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/hierarchy_memory/cache/cache_onelevel.h
r2 r78 12 12 #include "access_port.h" 13 13 #include "write_buffer.h" 14 15 using namespace std;16 using namespace hierarchy_memory::sort_file;17 using namespace hierarchy_memory::cache::cache_multilevel;18 14 19 15 namespace hierarchy_memory { … … 518 514 } 519 515 520 516 }; 521 517 };};};}; 522 518 #endif //!CACHE_ONELEVEL_H -
trunk/IPs/systemC/hierarchy_memory/file/main.cpp
r2 r78 179 179 if (my_Sort_File_Dynamic.pop().data != 1 ) test_ko ( 2); cout << my_Sort_File_Dynamic << endl; 180 180 if (my_Sort_File_Dynamic.pop().data != 2 ) test_ko ( 3); cout << my_Sort_File_Dynamic << endl; 181 182 183 181 } 184 182 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Makefile.deps
r72 r78 20 20 Functionnal_unit_LIBRARY = -lFunctionnal_unit \ 21 21 $(Custom_LIBRARY) \ 22 -lFunctionnal_unit \ 22 23 $(Behavioural_LIBRARY) 23 24 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h
r72 r78 13 13 #include "Common/include/ErrorMorpheo.h" 14 14 #include "Behavioural/include/Types.h" 15 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/ include/Types.h"15 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h" 16 16 17 17 namespace morpheo { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h
r76 r78 148 148 }; 149 149 150 typedef void function_execute_t (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_operation_t *, 151 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_register_t *, 152 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_param_t *); 153 154 typedef void function_execute_end_cycle_t (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_register_t *, 155 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_param_t *); 150 typedef void function_execute_t 151 (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_operation_t *, 152 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_register_t *, 153 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_param_t *); 154 155 typedef void function_execute_end_cycle_t 156 (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_register_t *, 157 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::execute_param_t *); 156 158 157 159 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/src/Operation.cpp
r76 r78 7 7 */ 8 8 9 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/ include/Operation.h"9 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h" 10 10 11 11 #define neg(data) (~(data)+1) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/configuration.cfg
r77 r78 8 8 2 2 +1 # size_special_data 9 9 16 16 +1 # nb_special_register 10 4 4 *2 # size_store_queue 11 1 4 *4 # size_load_queue -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/main.cpp
r77 r78 9 9 #include "Behavioural/Custom/include/Custom_example.h" 10 10 11 #define NB_PARAMS 811 #define NB_PARAMS 10 12 12 13 13 void usage (int argc, char * argv[]) … … 23 23 err (_(" * size_special_data (uint32_t)\n")); 24 24 err (_(" * nb_special_register (uint32_t)\n")); 25 err (_(" * size_store_queue (uint32_t)\n")); 26 err (_(" * size_load_queue (uint32_t)\n")); 25 27 exit (1); 26 28 } … … 46 48 const uint32_t size_special_data = atoi(argv[x++]); 47 49 const uint32_t nb_special_register = atoi(argv[x++]); 50 const uint32_t size_store_queue = atoi(argv[x++]); 51 const uint32_t size_load_queue = atoi(argv[x++]); 48 52 49 53 execute_timing_t ** timing = new execute_timing_t * [MAX_TYPE]; … … 68 72 size_special_data , 69 73 nb_special_register , 74 size_store_queue , 75 size_load_queue , 70 76 timing , 71 77 &(morpheo::behavioural::custom::example_get_custom_information) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/test.cpp
r76 r78 142 142 sc_signal<Toperation_t > in_EXECUTE_IN_OPERATION (rename.c_str()); 143 143 sc_signal<Ttype_t > in_EXECUTE_IN_TYPE (rename.c_str()); 144 sc_signal<Tlsq_ptr_t > in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE (rename.c_str()); 145 sc_signal<Tlsq_ptr_t > in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE (rename.c_str()); 144 146 sc_signal<Tcontrol_t > in_EXECUTE_IN_HAS_IMMEDIAT (rename.c_str()); 145 147 sc_signal<Tgeneral_data_t > in_EXECUTE_IN_IMMEDIAT (rename.c_str()); … … 160 162 sc_signal<Tpacket_t > out_EXECUTE_OUT_PACKET_ID (rename.c_str()); 161 163 //sc_signal<Toperation_t > out_EXECUTE_OUT_OPERATION (rename.c_str()); 162 //sc_signal<Ttype_t > out_EXECUTE_OUT_TYPE (rename.c_str());164 sc_signal<Ttype_t > out_EXECUTE_OUT_TYPE (rename.c_str()); 163 165 sc_signal<Tcontrol_t > out_EXECUTE_OUT_WRITE_RD (rename.c_str()); 164 166 sc_signal<Tgeneral_address_t> out_EXECUTE_OUT_NUM_REG_RD (rename.c_str()); … … 191 193 (*(_Functionnal_unit-> in_EXECUTE_IN_OPERATION )) ( in_EXECUTE_IN_OPERATION ); 192 194 (*(_Functionnal_unit-> in_EXECUTE_IN_TYPE )) ( in_EXECUTE_IN_TYPE ); 195 (*(_Functionnal_unit-> in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE)) ( in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE); 196 if (_param->_have_port_load_queue_ptr) 197 (*(_Functionnal_unit-> in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE )) ( in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE ); 193 198 (*(_Functionnal_unit-> in_EXECUTE_IN_HAS_IMMEDIAT )) ( in_EXECUTE_IN_HAS_IMMEDIAT ); 194 199 (*(_Functionnal_unit-> in_EXECUTE_IN_IMMEDIAT )) ( in_EXECUTE_IN_IMMEDIAT ); … … 212 217 (*(_Functionnal_unit->out_EXECUTE_OUT_PACKET_ID )) (out_EXECUTE_OUT_PACKET_ID ); 213 218 //(*(_Functionnal_unit->out_EXECUTE_OUT_OPERATION )) (out_EXECUTE_OUT_OPERATION ); 214 //(*(_Functionnal_unit->out_EXECUTE_OUT_TYPE )) (out_EXECUTE_OUT_TYPE );219 (*(_Functionnal_unit->out_EXECUTE_OUT_TYPE )) (out_EXECUTE_OUT_TYPE ); 215 220 (*(_Functionnal_unit->out_EXECUTE_OUT_WRITE_RD )) (out_EXECUTE_OUT_WRITE_RD ); 216 221 (*(_Functionnal_unit->out_EXECUTE_OUT_NUM_REG_RD )) (out_EXECUTE_OUT_NUM_REG_RD ); … … 616 621 in_EXECUTE_IN_OPERATION .write(transaction_in.front()._operation ); 617 622 in_EXECUTE_IN_TYPE .write(transaction_in.front()._type ); 623 in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE.write(0); 624 if (_param->_have_port_load_queue_ptr) 625 in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE .write(0); 618 626 in_EXECUTE_IN_HAS_IMMEDIAT .write(transaction_in.front()._has_immediat ); 619 627 in_EXECUTE_IN_IMMEDIAT .write(transaction_in.front()._immediat ); … … 641 649 TEST(Tcontext_t , out_EXECUTE_OUT_OOO_ENGINE_ID.read(), transaction_out.front()._ooo_engine_id); 642 650 //TEST(Toperation_t , out_EXECUTE_OUT_OPERATION .read(), transaction_out.front()._operation ); 643 //TEST(Ttype_t , out_EXECUTE_OUT_TYPE .read(), transaction_out.front()._type );651 TEST(Ttype_t , out_EXECUTE_OUT_TYPE .read(), transaction_out.front()._type ); 644 652 TEST(Tcontrol_t , out_EXECUTE_OUT_WRITE_RE .read(), transaction_out.front()._write_re ); 645 653 TEST(Tgeneral_address_t, out_EXECUTE_OUT_NUM_REG_RD .read(), transaction_out.front()._num_reg_rd ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h
r76 r78 10 10 */ 11 11 12 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Operation.h"13 14 12 #ifdef SYSTEMC 15 13 #include "systemc.h" … … 20 18 #include "Common/include/Debug.h" 21 19 #include "Behavioural/include/Types.h" 20 #include "Behavioural/include/Identification.h" 22 21 22 #include "Behavioural/include/Types.h" 23 23 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h" 24 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/ include/Types.h"24 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h" 25 25 #ifdef STATISTICS 26 26 #include "Behavioural/include/Stat.h" … … 86 86 public : SC_IN (Toperation_t ) * in_EXECUTE_IN_OPERATION ; 87 87 public : SC_IN (Ttype_t ) * in_EXECUTE_IN_TYPE ; 88 public : SC_IN (Tlsq_ptr_t ) * in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE; 89 public : SC_IN (Tlsq_ptr_t ) * in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE; 88 90 public : SC_IN (Tcontrol_t ) * in_EXECUTE_IN_HAS_IMMEDIAT ; 89 91 public : SC_IN (Tgeneral_data_t ) * in_EXECUTE_IN_IMMEDIAT ; … … 104 106 public : SC_OUT(Tpacket_t ) * out_EXECUTE_OUT_PACKET_ID ; 105 107 //public : SC_OUT(Toperation_t ) * out_EXECUTE_OUT_OPERATION ; 106 //public : SC_OUT(Ttype_t ) * out_EXECUTE_OUT_TYPE ;108 public : SC_OUT(Ttype_t ) * out_EXECUTE_OUT_TYPE ; 107 109 public : SC_OUT(Tcontrol_t ) * out_EXECUTE_OUT_WRITE_RD ; 108 110 public : SC_OUT(Tgeneral_address_t) * out_EXECUTE_OUT_NUM_REG_RD ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h
r77 r78 11 11 #include "Common/include/Debug.h" 12 12 #include "Behavioural/include/Parameters.h" 13 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/ include/Types.h"13 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h" 14 14 #include "Behavioural/Custom/include/Custom.h" 15 #include "Behavioural/Custom/include/Custom_default.h" 15 16 #include <math.h> 16 17 … … 36 37 public : const uint32_t _size_special_data ; 37 38 public : const uint32_t _nb_special_register ; 39 public : const uint32_t _size_store_queue ; 40 public : const uint32_t _size_load_queue ; 41 38 42 public : execute_timing_t ** _timing ; 39 43 public : morpheo::behavioural::custom::custom_information_t (*_get_custom_information) (uint32_t); … … 50 54 public : const bool _have_port_ooo_engine_id ; 51 55 public : const bool _have_port_packet_id ; 56 public : const bool _have_port_load_queue_ptr ; 52 57 53 58 public : const bool _have_groupe_MAC ; … … 62 67 uint32_t size_special_data , 63 68 uint32_t nb_special_register, 69 uint32_t size_store_queue , 70 uint32_t size_load_queue , 64 71 execute_timing_t** timing , 65 72 morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t)); … … 67 74 public : ~Parameters () ; 68 75 69 public : std::stringmsg_error (void);76 public : Parameters_test msg_error (void); 70 77 71 78 public : std::string print (uint32_t depth); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp
r77 r78 71 71 in_EXECUTE_IN_OPERATION = interface->set_signal_in <Toperation_t > ("operation" , _param->_size_operation ); 72 72 in_EXECUTE_IN_TYPE = interface->set_signal_in <Ttype_t > ("type" , _param->_size_type ); 73 in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t> ("store_queue_ptr_write",log2(_param->_size_store_queue)); 74 if (_param->_have_port_load_queue_ptr) 75 in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t> ("load_queue_ptr_write" ,log2(_param->_size_load_queue)); 73 76 in_EXECUTE_IN_HAS_IMMEDIAT = interface->set_signal_in <Tcontrol_t > ("has_immediat" , 1); 74 77 in_EXECUTE_IN_IMMEDIAT = interface->set_signal_in <Tgeneral_data_t > ("immediat" , _param->_size_general_data); … … 102 105 out_EXECUTE_OUT_PACKET_ID = interface->set_signal_out<Tpacket_t > ("packet_id" ,_param->_size_packet_id ); 103 106 //out_EXECUTE_OUT_OPERATION = interface->set_signal_out<Toperation_t > ("operation" ,_param->_size_operation ); 104 //out_EXECUTE_OUT_TYPE = interface->set_signal_out<Ttype_t > ("type" ,_param->_size_type );107 out_EXECUTE_OUT_TYPE = interface->set_signal_out<Ttype_t > ("type" ,_param->_size_type ); 105 108 out_EXECUTE_OUT_WRITE_RD = interface->set_signal_out<Tcontrol_t > ("write_rd" ,1); 106 109 out_EXECUTE_OUT_NUM_REG_RD = interface->set_signal_out<Tgeneral_address_t> ("num_reg_rd" ,_param->_size_general_register); … … 111 114 out_EXECUTE_OUT_EXCEPTION = interface->set_signal_out<Texception_t > ("exception" ,_param->_size_exception); 112 115 out_EXECUTE_OUT_NO_SEQUENCE = interface->set_signal_out<Tcontrol_t > ("no_sequence" ,1); 113 out_EXECUTE_OUT_ADDRESS = interface->set_signal_out<Tgeneral_data_t > ("address ",_param->_size_general_data);116 out_EXECUTE_OUT_ADDRESS = interface->set_signal_out<Tgeneral_data_t > ("address" ,_param->_size_general_data); 114 117 } 115 118 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp
r76 r78 41 41 delete in_EXECUTE_IN_OPERATION ; 42 42 delete in_EXECUTE_IN_TYPE ; 43 delete in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE; 44 if (_param->_have_port_load_queue_ptr) 45 delete in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE ; 43 46 delete in_EXECUTE_IN_HAS_IMMEDIAT ; 44 47 delete in_EXECUTE_IN_IMMEDIAT ; … … 62 65 delete out_EXECUTE_OUT_PACKET_ID ; 63 66 //delete out_EXECUTE_OUT_OPERATION ; 64 //delete out_EXECUTE_OUT_TYPE ;67 delete out_EXECUTE_OUT_TYPE ; 65 68 delete out_EXECUTE_OUT_WRITE_RD ; 66 69 delete out_EXECUTE_OUT_NUM_REG_RD ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMoore.cpp
r72 r78 37 37 PORT_WRITE(out_EXECUTE_OUT_PACKET_ID ,_execute_operation->_packet_id ); 38 38 //PORT_WRITE(out_EXECUTE_OUT_OPERATION ,_execute_operation->_operation ); 39 //PORT_WRITE(out_EXECUTE_OUT_TYPE ,_execute_operation->_type );39 PORT_WRITE(out_EXECUTE_OUT_TYPE ,_execute_operation->_type ); 40 40 PORT_WRITE(out_EXECUTE_OUT_WRITE_RD ,_execute_operation->_write_rd ); 41 41 PORT_WRITE(out_EXECUTE_OUT_NUM_REG_RD ,_execute_operation->_num_reg_rd ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp
r77 r78 28 28 uint32_t size_special_data , 29 29 uint32_t nb_special_register, 30 uint32_t size_store_queue , 31 uint32_t size_load_queue , 30 32 execute_timing_t** timing , 31 33 morpheo::behavioural::custom::custom_information_t (*get_custom_information) (uint32_t)) : … … 38 40 _size_special_data (size_special_data ), 39 41 _nb_special_register (nb_special_register ), 40 42 _size_store_queue (size_store_queue ), 43 _size_load_queue (size_load_queue ), 44 41 45 _size_context_id (log2(nb_context )), 42 46 _size_front_end_id (log2(nb_front_end )), 43 47 _size_ooo_engine_id (log2(nb_ooo_engine )), 44 48 _size_packet_id (log2(nb_packet )), 45 _size_general_register (log2( _size_general_register)),46 _size_special_register (log2( _size_special_register)),49 _size_general_register (log2(nb_general_register)), 50 _size_special_register (log2(nb_special_register)), 47 51 48 52 _have_port_context_id (_size_context_id > 0), … … 50 54 _have_port_ooo_engine_id (_size_ooo_engine_id > 0), 51 55 _have_port_packet_id (_size_packet_id > 0), 56 _have_port_load_queue_ptr(_size_load_queue > 1), 52 57 53 58 _have_groupe_MAC ( (timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MAC ]._latence > 0) or … … 58 63 59 64 _timing = timing; 60 _get_custom_information = get_custom_information; 65 66 if (get_custom_information == NULL) 67 _get_custom_information = &(morpheo::behavioural::custom::default_get_custom_information); 68 else 69 _get_custom_information = get_custom_information; 61 70 62 71 test(); … … 76 85 _size_special_data (param._size_special_data ), 77 86 _nb_special_register (param._nb_special_register ), 87 _size_store_queue (param._size_store_queue ), 88 _size_load_queue (param._size_load_queue ), 78 89 79 90 _size_context_id (param._size_context_id ), … … 88 99 _have_port_ooo_engine_id (param._have_port_ooo_engine_id), 89 100 _have_port_packet_id (param._have_port_packet_id ), 101 _have_port_load_queue_ptr(param._have_port_load_queue_ptr), 90 102 91 103 _have_groupe_MAC (param._have_groupe_MAC ) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters_msg_error.cpp
r77 r78 22 22 #undef FUNCTION 23 23 #define FUNCTION "Functionnal_unit::msg_error" 24 std::stringParameters::msg_error(void)24 Parameters_test Parameters::msg_error(void) 25 25 { 26 26 log_printf(FUNC,Functionnal_unit,FUNCTION,"Begin"); 27 27 28 std::string msg = "";28 Parameters_test test("Functionnal_unit"); 29 29 30 30 for (uint32_t i=0; i<_nb_type; i++) 31 31 for (uint32_t j=0; j<_nb_operation; j++) 32 32 if (_timing[i][j]._delay != _timing[i][j]._latence) 33 msg = " - For the type '"+toString(i)+"', and the operation '"+toString(j)+"', the delay and the latence must be equal.";33 test.error("For the type '"+toString(i)+"', and the operation '"+toString(j)+"', the delay and the latence must be equal."); 34 34 35 35 if (_have_groupe_MAC and ((_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MAC ]._latence == 0) or 36 36 (_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MACRC]._latence == 0) or 37 37 (_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MSB ]._latence == 0))) 38 msg = " - The functionnal unit implement a MAC unit, the latence to operation OPERATION_ALU_L_MAC, OPERATION_ALU_L_MACRC and OPERATION_ALU_L_MSB must be higher than 0."; 39 40 return msg; 38 test.error("The functionnal unit implement a MAC unit, the latence to operation OPERATION_ALU_L_MAC, OPERATION_ALU_L_MACRC and OPERATION_ALU_L_MSB must be higher than 0."); 41 39 42 40 log_printf(FUNC,Functionnal_unit,FUNCTION,"End"); 41 42 return test; 43 43 }; 44 44 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/configuration.cfg
r77 r78 5 5 2 2 +1 # nb_port_check 6 6 2 2 +1 # speculative_load {none,access,commit,bypass} 7 0 0 +1 # bypass_memory 7 8 2 2 *2 # nb_context 1 1 *2 8 9 2 2 *2 # nb_front_end 1 1 *2 … … 10 11 64 64 *2 # nb_packet 11 12 32 32 *2 # size_general_data 13 2 2 *2 # size_special_data 12 14 32 32 *2 # nb_general_register 15 16 16 *2 # nb_special_register -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/main.cpp
r77 r78 10 10 #define number_of_test 2 11 11 12 #define NB_PARAMS 1 112 #define NB_PARAMS 14 13 13 14 14 void usage (int argc, char * argv[]) … … 21 21 << " - nb_port_check (uint32_t)" << endl 22 22 << " - speculative_load (uint32_t)" << endl 23 << " - nb_bypass_memory (uint32_t)" << endl 23 24 << " - nb_context (uint32_t)" << endl 24 25 << " - nb_front_end (uint32_t)" << endl … … 26 27 << " - nb_packet (uint32_t)" << endl 27 28 << " - size_general_data (uint32_t)" << endl 29 << " - size_special_data (uint32_t)" << endl 28 30 << " - nb_general_register (uint32_t)" << endl 31 << " - nb_special_register (uint32_t)" << endl 29 32 << "" << endl; 30 33 … … 58 61 const uint32_t _nb_port_check = atoi(argv[x++]); 59 62 const Tspeculative_load_t _speculative_load = fromString<Tspeculative_load_t>(argv[x++]); 63 const uint32_t _nb_bypass_memory = atoi(argv[x++]); 60 64 const uint32_t _nb_context = atoi(argv[x++]); 61 65 const uint32_t _nb_front_end = atoi(argv[x++]); … … 63 67 const uint32_t _nb_packet = atoi(argv[x++]); 64 68 const uint32_t _size_general_data = atoi(argv[x++]); 69 const uint32_t _size_special_data = atoi(argv[x++]); 65 70 const uint32_t _nb_general_register = atoi(argv[x++]); 71 const uint32_t _nb_special_register = atoi(argv[x++]); 66 72 67 73 try … … 74 80 _nb_port_check , 75 81 _speculative_load , 82 _nb_bypass_memory , 76 83 _nb_context , 77 84 _nb_front_end , … … 79 86 _nb_packet , 80 87 _size_general_data , 81 _nb_general_register ); 88 _size_special_data , 89 _nb_general_register , 90 _nb_special_register ); 82 91 83 92 cout << param->print(1); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp
r72 r78 73 73 sc_signal<Tlsq_ptr_t > * in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t > (rename.c_str()); 74 74 sc_signal<Tlsq_ptr_t > * in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t > (rename.c_str()); 75 //sc_signal<Tcontrol_t > * in_MEMORY_IN_HAS_IMMEDIAT = new sc_signal<Tcontrol_t > (rename.c_str());75 sc_signal<Tcontrol_t > * in_MEMORY_IN_HAS_IMMEDIAT = new sc_signal<Tcontrol_t > (rename.c_str()); 76 76 sc_signal<Tgeneral_data_t > * in_MEMORY_IN_IMMEDIAT = new sc_signal<Tgeneral_data_t > (rename.c_str()); 77 77 sc_signal<Tgeneral_data_t > * in_MEMORY_IN_DATA_RA = new sc_signal<Tgeneral_data_t > (rename.c_str()); 78 78 sc_signal<Tgeneral_data_t > * in_MEMORY_IN_DATA_RB = new sc_signal<Tgeneral_data_t > (rename.c_str()); 79 //sc_signal<Tspecial_data_t > * in_MEMORY_IN_DATA_RC = new sc_signal<Tspecial_data_t > (rename.c_str());80 //sc_signal<Tcontrol_t > * in_MEMORY_IN_WRITE_RD = new sc_signal<Tcontrol_t > (rename.c_str());79 sc_signal<Tspecial_data_t > * in_MEMORY_IN_DATA_RC = new sc_signal<Tspecial_data_t > (rename.c_str()); 80 sc_signal<Tcontrol_t > * in_MEMORY_IN_WRITE_RD = new sc_signal<Tcontrol_t > (rename.c_str()); 81 81 sc_signal<Tgeneral_address_t> * in_MEMORY_IN_NUM_REG_RD = new sc_signal<Tgeneral_address_t> (rename.c_str()); 82 //sc_signal<Tcontrol_t > * in_MEMORY_IN_WRITE_RE = new sc_signal<Tcontrol_t > (rename.c_str());83 //sc_signal<Tspecial_address_t> * in_MEMORY_IN_NUM_REG_RE = new sc_signal<Tspecial_address_t> (rename.c_str());82 sc_signal<Tcontrol_t > * in_MEMORY_IN_WRITE_RE = new sc_signal<Tcontrol_t > (rename.c_str()); 83 sc_signal<Tspecial_address_t> * in_MEMORY_IN_NUM_REG_RE = new sc_signal<Tspecial_address_t> (rename.c_str()); 84 84 85 85 sc_signal<Tcontrol_t > * out_MEMORY_OUT_VAL = new sc_signal<Tcontrol_t >(rename.c_str()); … … 89 89 sc_signal<Tcontext_t > * out_MEMORY_OUT_OOO_ENGINE_ID = new sc_signal<Tcontext_t >(rename.c_str()); 90 90 sc_signal<Tpacket_t > * out_MEMORY_OUT_PACKET_ID = new sc_signal<Tpacket_t >(rename.c_str()); 91 // sc_signal<Toperation_t > * out_MEMORY_OUT_OPERATION = new sc_signal<Toperation_t >(rename.c_str()); 92 sc_signal<Ttype_t > * out_MEMORY_OUT_TYPE = new sc_signal<Ttype_t >(rename.c_str()); 91 93 sc_signal<Tcontrol_t > * out_MEMORY_OUT_WRITE_RD = new sc_signal<Tcontrol_t >(rename.c_str()); 92 94 sc_signal<Tgeneral_address_t> * out_MEMORY_OUT_NUM_REG_RD = new sc_signal<Tgeneral_address_t>(rename.c_str()); 93 95 sc_signal<Tgeneral_data_t > * out_MEMORY_OUT_DATA_RD = new sc_signal<Tgeneral_data_t >(rename.c_str()); 94 //sc_signal<Tcontrol_t > * out_MEMORY_OUT_WRITE_RE = new sc_signal<Tcontrol_t >(rename.c_str());95 //sc_signal<Tspecial_address_t> * out_MEMORY_OUT_NUM_REG_RE = new sc_signal<Tspecial_address_t>(rename.c_str());96 //sc_signal<Tspecial_data_t > * out_MEMORY_OUT_DATA_RE = new sc_signal<Tspecial_data_t >(rename.c_str());96 sc_signal<Tcontrol_t > * out_MEMORY_OUT_WRITE_RE = new sc_signal<Tcontrol_t >(rename.c_str()); 97 sc_signal<Tspecial_address_t> * out_MEMORY_OUT_NUM_REG_RE = new sc_signal<Tspecial_address_t>(rename.c_str()); 98 sc_signal<Tspecial_data_t > * out_MEMORY_OUT_DATA_RE = new sc_signal<Tspecial_data_t >(rename.c_str()); 97 99 sc_signal<Texception_t > * out_MEMORY_OUT_EXCEPTION = new sc_signal<Texception_t >(rename.c_str()); 100 sc_signal<Tcontrol_t > * out_MEMORY_OUT_NO_SEQUENCE = new sc_signal<Tcontrol_t >(rename.c_str()); 101 sc_signal<Tgeneral_data_t > * out_MEMORY_OUT_ADDRESS = new sc_signal<Tgeneral_data_t >(rename.c_str()); 98 102 99 103 sc_signal<Tcontrol_t > * out_DCACHE_REQ_VAL = new sc_signal<Tcontrol_t >(rename.c_str()); … … 112 116 sc_signal<Tdcache_error_t > * in_DCACHE_RSP_ERROR = new sc_signal<Tdcache_error_t >(rename.c_str()); 113 117 114 sc_signal<Tcontrol_t > ** out_BYPASS_MEMORY_VAL = new sc_signal<Tcontrol_t > * [_param->_ size_load_queue];115 sc_signal<Tcontext_t > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_ size_load_queue];116 sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_ size_load_queue];117 sc_signal<Tgeneral_data_t > ** out_BYPASS_MEMORY_DATA = new sc_signal<Tgeneral_data_t > * [_param->_ size_load_queue];118 sc_signal<Tcontrol_t > ** out_BYPASS_MEMORY_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_bypass_memory]; 119 sc_signal<Tcontext_t > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_bypass_memory]; 120 sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_memory]; 121 sc_signal<Tgeneral_data_t > ** out_BYPASS_MEMORY_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_bypass_memory]; 118 122 119 for (uint32_t i=0; i<_param->_ size_load_queue; i++)123 for (uint32_t i=0; i<_param->_nb_bypass_memory; i++) 120 124 { 121 125 out_BYPASS_MEMORY_VAL [i] = new sc_signal<Tcontrol_t >(rename.c_str()); … … 137 141 (*(_Load_store_unit->out_MEMORY_IN_ACK ))(*(out_MEMORY_IN_ACK )); 138 142 if (_param->_have_port_context_id) 139 143 (*(_Load_store_unit-> in_MEMORY_IN_CONTEXT_ID ))(*( in_MEMORY_IN_CONTEXT_ID )); 140 144 if (_param->_have_port_front_end_id) 141 145 (*(_Load_store_unit-> in_MEMORY_IN_FRONT_END_ID ))(*( in_MEMORY_IN_FRONT_END_ID )); 142 146 if (_param->_have_port_ooo_engine_id) 143 147 (*(_Load_store_unit-> in_MEMORY_IN_OOO_ENGINE_ID ))(*( in_MEMORY_IN_OOO_ENGINE_ID )); 144 148 if (_param->_have_port_packet_id) 145 149 (*(_Load_store_unit-> in_MEMORY_IN_PACKET_ID ))(*( in_MEMORY_IN_PACKET_ID )); 146 150 (*(_Load_store_unit-> in_MEMORY_IN_OPERATION ))(*( in_MEMORY_IN_OPERATION )); 151 (*(_Load_store_unit-> in_MEMORY_IN_TYPE ))(*( in_MEMORY_IN_TYPE )); 147 152 (*(_Load_store_unit-> in_MEMORY_IN_STORE_QUEUE_PTR_WRITE))(*( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE)); 153 if (_param->_have_port_load_queue_ptr) 148 154 (*(_Load_store_unit-> in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ))(*( in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE )); 149 //(*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT ))(*( in_MEMORY_IN_HAS_IMMEDIAT ));155 (*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT ))(*( in_MEMORY_IN_HAS_IMMEDIAT )); 150 156 (*(_Load_store_unit-> in_MEMORY_IN_IMMEDIAT ))(*( in_MEMORY_IN_IMMEDIAT )); 151 157 (*(_Load_store_unit-> in_MEMORY_IN_DATA_RA ))(*( in_MEMORY_IN_DATA_RA )); 152 158 (*(_Load_store_unit-> in_MEMORY_IN_DATA_RB ))(*( in_MEMORY_IN_DATA_RB )); 153 //(*(_Load_store_unit-> in_MEMORY_IN_DATA_RC ))(*( in_MEMORY_IN_DATA_RC ));154 //(*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD ))(*( in_MEMORY_IN_WRITE_RD ));159 (*(_Load_store_unit-> in_MEMORY_IN_DATA_RC ))(*( in_MEMORY_IN_DATA_RC )); 160 (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD ))(*( in_MEMORY_IN_WRITE_RD )); 155 161 (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RD ))(*( in_MEMORY_IN_NUM_REG_RD )); 156 //(*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE ))(*( in_MEMORY_IN_WRITE_RE ));157 //(*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE ))(*( in_MEMORY_IN_NUM_REG_RE ));162 (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE ))(*( in_MEMORY_IN_WRITE_RE )); 163 (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE ))(*( in_MEMORY_IN_NUM_REG_RE )); 158 164 159 165 (*(_Load_store_unit->out_MEMORY_OUT_VAL ))(*(out_MEMORY_OUT_VAL )); 160 166 (*(_Load_store_unit-> in_MEMORY_OUT_ACK ))(*( in_MEMORY_OUT_ACK )); 161 167 if (_param->_have_port_context_id) 162 168 (*(_Load_store_unit->out_MEMORY_OUT_CONTEXT_ID ))(*(out_MEMORY_OUT_CONTEXT_ID )); 163 169 if (_param->_have_port_front_end_id) 164 170 (*(_Load_store_unit->out_MEMORY_OUT_FRONT_END_ID ))(*(out_MEMORY_OUT_FRONT_END_ID )); 165 171 if (_param->_have_port_ooo_engine_id) 166 172 (*(_Load_store_unit->out_MEMORY_OUT_OOO_ENGINE_ID ))(*(out_MEMORY_OUT_OOO_ENGINE_ID )); 167 173 if (_param->_have_port_packet_id) 168 (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID ))(*(out_MEMORY_OUT_PACKET_ID )); 174 (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID ))(*(out_MEMORY_OUT_PACKET_ID )); 175 // (*(_Load_store_unit->out_MEMORY_OUT_OPERATION ))(*(out_MEMORY_OUT_OPERATION )); 176 (*(_Load_store_unit->out_MEMORY_OUT_TYPE ))(*(out_MEMORY_OUT_TYPE )); 169 177 (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RD ))(*(out_MEMORY_OUT_WRITE_RD )); 170 178 (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RD ))(*(out_MEMORY_OUT_NUM_REG_RD )); 171 179 (*(_Load_store_unit->out_MEMORY_OUT_DATA_RD ))(*(out_MEMORY_OUT_DATA_RD )); 172 //(*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE ))(*(out_MEMORY_OUT_WRITE_RE ));173 //(*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE ))(*(out_MEMORY_OUT_NUM_REG_RE ));174 //(*(_Load_store_unit->out_MEMORY_OUT_DATA_RE ))(*(out_MEMORY_OUT_DATA_RE ));180 (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE ))(*(out_MEMORY_OUT_WRITE_RE )); 181 (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE ))(*(out_MEMORY_OUT_NUM_REG_RE )); 182 (*(_Load_store_unit->out_MEMORY_OUT_DATA_RE ))(*(out_MEMORY_OUT_DATA_RE )); 175 183 (*(_Load_store_unit->out_MEMORY_OUT_EXCEPTION ))(*(out_MEMORY_OUT_EXCEPTION )); 184 (*(_Load_store_unit->out_MEMORY_OUT_NO_SEQUENCE ))(*(out_MEMORY_OUT_NO_SEQUENCE )); 185 (*(_Load_store_unit->out_MEMORY_OUT_ADDRESS ))(*(out_MEMORY_OUT_ADDRESS )); 176 186 177 187 (*(_Load_store_unit->out_DCACHE_REQ_VAL ))(*(out_DCACHE_REQ_VAL )); … … 192 202 (*(_Load_store_unit-> in_DCACHE_RSP_ERROR ))(*( in_DCACHE_RSP_ERROR )); 193 203 194 if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)195 204 { 196 for (uint32_t i=0; i<_param->_ size_load_queue; i++)205 for (uint32_t i=0; i<_param->_nb_bypass_memory; i++) 197 206 { 198 207 (*(_Load_store_unit->out_BYPASS_MEMORY_VAL [i]))(*(out_BYPASS_MEMORY_VAL [i])); … … 486 495 in_MEMORY_IN_TYPE ->write (fifo_request.top()._type ); 487 496 in_MEMORY_IN_STORE_QUEUE_PTR_WRITE->write (fifo_request.top()._store_queue_ptr_write); 497 if (_param->_have_port_load_queue_ptr) 488 498 in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ->write (fifo_request.top()._load_queue_ptr_write ); 489 499 in_MEMORY_IN_IMMEDIAT ->write (fifo_request.top()._immediat ); … … 563 573 TEST(Tcontext_t , out_MEMORY_OUT_OOO_ENGINE_ID->read(), tab_request[packet_id]._ooo_engine_id); 564 574 TEST(Tpacket_t , out_MEMORY_OUT_PACKET_ID ->read(), tab_request[packet_id]._packet_id ); 575 // TEST(Toperation_t , out_MEMORY_OUT_OPERATION ->read(), tab_request[packet_id]._operation ); 576 TEST(Ttype_t , out_MEMORY_OUT_TYPE ->read(), TYPE_MEMORY ); 565 577 TEST(Tcontrol_t , out_MEMORY_OUT_WRITE_RD ->read(), tab_request[packet_id]._write_rd ); 566 578 TEST(Tgeneral_address_t, out_MEMORY_OUT_NUM_REG_RD ->read(), tab_request[packet_id]._num_reg_rd ); … … 682 694 delete in_MEMORY_IN_STORE_QUEUE_PTR_WRITE; 683 695 delete in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ; 684 //delete in_MEMORY_IN_HAS_IMMEDIAT;696 delete in_MEMORY_IN_HAS_IMMEDIAT; 685 697 delete in_MEMORY_IN_IMMEDIAT ; 686 698 delete in_MEMORY_IN_DATA_RA ; 687 699 delete in_MEMORY_IN_DATA_RB ; 688 //delete in_MEMORY_IN_DATA_RC ;689 //delete in_MEMORY_IN_WRITE_RD ;700 delete in_MEMORY_IN_DATA_RC ; 701 delete in_MEMORY_IN_WRITE_RD ; 690 702 delete in_MEMORY_IN_NUM_REG_RD ; 691 //delete in_MEMORY_IN_WRITE_RE ;692 //delete in_MEMORY_IN_NUM_REG_RE ;703 delete in_MEMORY_IN_WRITE_RE ; 704 delete in_MEMORY_IN_NUM_REG_RE ; 693 705 694 706 delete out_MEMORY_OUT_VAL ; … … 698 710 delete out_MEMORY_OUT_OOO_ENGINE_ID; 699 711 delete out_MEMORY_OUT_PACKET_ID ; 712 // delete out_MEMORY_OUT_OPERATION ; 713 delete out_MEMORY_OUT_TYPE ; 700 714 delete out_MEMORY_OUT_WRITE_RD ; 701 715 delete out_MEMORY_OUT_NUM_REG_RD; 702 716 delete out_MEMORY_OUT_DATA_RD ; 703 //delete out_MEMORY_OUT_WRITE_RE ;704 //delete out_MEMORY_OUT_NUM_REG_RE;705 //delete out_MEMORY_OUT_DATA_RE ;717 delete out_MEMORY_OUT_WRITE_RE ; 718 delete out_MEMORY_OUT_NUM_REG_RE; 719 delete out_MEMORY_OUT_DATA_RE ; 706 720 delete out_MEMORY_OUT_EXCEPTION ; 721 delete out_MEMORY_OUT_NO_SEQUENCE; 722 delete out_MEMORY_OUT_ADDRESS ; 707 723 708 724 delete out_DCACHE_REQ_VAL ; … … 721 737 delete in_DCACHE_RSP_ERROR ; 722 738 723 if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)724 739 { 725 740 delete [] out_BYPASS_MEMORY_VAL ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp
r77 r78 52 52 2, //_nb_port_check 53 53 SPECULATIVE_LOAD_COMMIT, //_speculative_load 54 0, //_nb_bypass_memory 54 55 1, //_nb_context 55 56 1, //_nb_front_end … … 57 58 128,//_nb_packet 58 59 32, //_size_general_data 59 64 //_nb_general_register 60 2 , //_size_special_data 61 64, //_nb_general_register 62 16 //_nb_special_register 60 63 ); 61 64 … … 89 92 sc_signal<Tlsq_ptr_t > * in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t > (rename.c_str()); 90 93 sc_signal<Tlsq_ptr_t > * in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t > (rename.c_str()); 91 //sc_signal<Tcontrol_t > * in_MEMORY_IN_HAS_IMMEDIAT = new sc_signal<Tcontrol_t > (rename.c_str());94 sc_signal<Tcontrol_t > * in_MEMORY_IN_HAS_IMMEDIAT = new sc_signal<Tcontrol_t > (rename.c_str()); 92 95 sc_signal<Tgeneral_data_t > * in_MEMORY_IN_IMMEDIAT = new sc_signal<Tgeneral_data_t > (rename.c_str()); 93 96 sc_signal<Tgeneral_data_t > * in_MEMORY_IN_DATA_RA = new sc_signal<Tgeneral_data_t > (rename.c_str()); 94 97 sc_signal<Tgeneral_data_t > * in_MEMORY_IN_DATA_RB = new sc_signal<Tgeneral_data_t > (rename.c_str()); 95 //sc_signal<Tspecial_data_t > * in_MEMORY_IN_DATA_RC = new sc_signal<Tspecial_data_t > (rename.c_str());96 //sc_signal<Tcontrol_t > * in_MEMORY_IN_WRITE_RD = new sc_signal<Tcontrol_t > (rename.c_str());98 sc_signal<Tspecial_data_t > * in_MEMORY_IN_DATA_RC = new sc_signal<Tspecial_data_t > (rename.c_str()); 99 sc_signal<Tcontrol_t > * in_MEMORY_IN_WRITE_RD = new sc_signal<Tcontrol_t > (rename.c_str()); 97 100 sc_signal<Tgeneral_address_t> * in_MEMORY_IN_NUM_REG_RD = new sc_signal<Tgeneral_address_t> (rename.c_str()); 98 //sc_signal<Tcontrol_t > * in_MEMORY_IN_WRITE_RE = new sc_signal<Tcontrol_t > (rename.c_str());99 //sc_signal<Tspecial_address_t> * in_MEMORY_IN_NUM_REG_RE = new sc_signal<Tspecial_address_t> (rename.c_str());101 sc_signal<Tcontrol_t > * in_MEMORY_IN_WRITE_RE = new sc_signal<Tcontrol_t > (rename.c_str()); 102 sc_signal<Tspecial_address_t> * in_MEMORY_IN_NUM_REG_RE = new sc_signal<Tspecial_address_t> (rename.c_str()); 100 103 101 104 sc_signal<Tcontrol_t > * out_MEMORY_OUT_VAL = new sc_signal<Tcontrol_t >(rename.c_str()); … … 105 108 sc_signal<Tcontext_t > * out_MEMORY_OUT_OOO_ENGINE_ID = new sc_signal<Tcontext_t >(rename.c_str()); 106 109 sc_signal<Tpacket_t > * out_MEMORY_OUT_PACKET_ID = new sc_signal<Tpacket_t >(rename.c_str()); 110 // sc_signal<Toperation_t > * out_MEMORY_OUT_OPERATION = new sc_signal<Toperation_t >(rename.c_str()); 111 sc_signal<Ttype_t > * out_MEMORY_OUT_TYPE = new sc_signal<Ttype_t >(rename.c_str()); 107 112 sc_signal<Tcontrol_t > * out_MEMORY_OUT_WRITE_RD = new sc_signal<Tcontrol_t >(rename.c_str()); 108 113 sc_signal<Tgeneral_address_t> * out_MEMORY_OUT_NUM_REG_RD = new sc_signal<Tgeneral_address_t>(rename.c_str()); 109 114 sc_signal<Tgeneral_data_t > * out_MEMORY_OUT_DATA_RD = new sc_signal<Tgeneral_data_t >(rename.c_str()); 110 //sc_signal<Tcontrol_t > * out_MEMORY_OUT_WRITE_RE = new sc_signal<Tcontrol_t >(rename.c_str());111 //sc_signal<Tspecial_address_t> * out_MEMORY_OUT_NUM_REG_RE = new sc_signal<Tspecial_address_t>(rename.c_str());112 //sc_signal<Tspecial_data_t > * out_MEMORY_OUT_DATA_RE = new sc_signal<Tspecial_data_t >(rename.c_str());115 sc_signal<Tcontrol_t > * out_MEMORY_OUT_WRITE_RE = new sc_signal<Tcontrol_t >(rename.c_str()); 116 sc_signal<Tspecial_address_t> * out_MEMORY_OUT_NUM_REG_RE = new sc_signal<Tspecial_address_t>(rename.c_str()); 117 sc_signal<Tspecial_data_t > * out_MEMORY_OUT_DATA_RE = new sc_signal<Tspecial_data_t >(rename.c_str()); 113 118 sc_signal<Texception_t > * out_MEMORY_OUT_EXCEPTION = new sc_signal<Texception_t >(rename.c_str()); 119 sc_signal<Tcontrol_t > * out_MEMORY_OUT_NO_SEQUENCE = new sc_signal<Tcontrol_t >(rename.c_str()); 120 sc_signal<Tgeneral_data_t > * out_MEMORY_OUT_ADDRESS = new sc_signal<Tgeneral_data_t >(rename.c_str()); 114 121 115 122 sc_signal<Tcontrol_t > * out_DCACHE_REQ_VAL = new sc_signal<Tcontrol_t >(rename.c_str()); … … 128 135 sc_signal<Tdcache_error_t > * in_DCACHE_RSP_ERROR = new sc_signal<Tdcache_error_t >(rename.c_str()); 129 136 130 sc_signal<Tcontrol_t > ** out_BYPASS_MEMORY_VAL = new sc_signal<Tcontrol_t > * [_param->_ size_load_queue];131 sc_signal<Tcontext_t > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_ size_load_queue];132 sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_ size_load_queue];133 sc_signal<Tgeneral_data_t > ** out_BYPASS_MEMORY_DATA = new sc_signal<Tgeneral_data_t > * [_param->_ size_load_queue];137 sc_signal<Tcontrol_t > ** out_BYPASS_MEMORY_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_bypass_memory]; 138 sc_signal<Tcontext_t > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_bypass_memory]; 139 sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_memory]; 140 sc_signal<Tgeneral_data_t > ** out_BYPASS_MEMORY_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_bypass_memory]; 134 141 135 for (uint32_t i=0; i<_param->_ size_load_queue; i++)142 for (uint32_t i=0; i<_param->_nb_bypass_memory; i++) 136 143 { 137 144 out_BYPASS_MEMORY_VAL [i] = new sc_signal<Tcontrol_t >(rename.c_str()); … … 161 168 (*(_Load_store_unit-> in_MEMORY_IN_PACKET_ID ))(*( in_MEMORY_IN_PACKET_ID )); 162 169 (*(_Load_store_unit-> in_MEMORY_IN_OPERATION ))(*( in_MEMORY_IN_OPERATION )); 170 (*(_Load_store_unit-> in_MEMORY_IN_TYPE ))(*( in_MEMORY_IN_TYPE )); 163 171 (*(_Load_store_unit-> in_MEMORY_IN_STORE_QUEUE_PTR_WRITE))(*( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE)); 172 if (_param->_have_port_load_queue_ptr) 164 173 (*(_Load_store_unit-> in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ))(*( in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE )); 165 //(*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT ))(*( in_MEMORY_IN_HAS_IMMEDIAT ));174 (*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT ))(*( in_MEMORY_IN_HAS_IMMEDIAT )); 166 175 (*(_Load_store_unit-> in_MEMORY_IN_IMMEDIAT ))(*( in_MEMORY_IN_IMMEDIAT )); 167 176 (*(_Load_store_unit-> in_MEMORY_IN_DATA_RA ))(*( in_MEMORY_IN_DATA_RA )); 168 177 (*(_Load_store_unit-> in_MEMORY_IN_DATA_RB ))(*( in_MEMORY_IN_DATA_RB )); 169 //(*(_Load_store_unit-> in_MEMORY_IN_DATA_RC ))(*( in_MEMORY_IN_DATA_RC ));170 //(*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD ))(*( in_MEMORY_IN_WRITE_RD ));178 (*(_Load_store_unit-> in_MEMORY_IN_DATA_RC ))(*( in_MEMORY_IN_DATA_RC )); 179 (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD ))(*( in_MEMORY_IN_WRITE_RD )); 171 180 (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RD ))(*( in_MEMORY_IN_NUM_REG_RD )); 172 //(*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE ))(*( in_MEMORY_IN_WRITE_RE ));173 //(*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE ))(*( in_MEMORY_IN_NUM_REG_RE ));181 (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE ))(*( in_MEMORY_IN_WRITE_RE )); 182 (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE ))(*( in_MEMORY_IN_NUM_REG_RE )); 174 183 175 184 (*(_Load_store_unit->out_MEMORY_OUT_VAL ))(*(out_MEMORY_OUT_VAL )); … … 183 192 if (_param->_have_port_packet_id) 184 193 (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID ))(*(out_MEMORY_OUT_PACKET_ID )); 194 // (*(_Load_store_unit->out_MEMORY_OUT_OPERATION ))(*(out_MEMORY_OUT_OPERATION )); 195 (*(_Load_store_unit->out_MEMORY_OUT_TYPE ))(*(out_MEMORY_OUT_TYPE )); 185 196 (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RD ))(*(out_MEMORY_OUT_WRITE_RD )); 186 197 (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RD ))(*(out_MEMORY_OUT_NUM_REG_RD )); 187 198 (*(_Load_store_unit->out_MEMORY_OUT_DATA_RD ))(*(out_MEMORY_OUT_DATA_RD )); 188 //(*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE ))(*(out_MEMORY_OUT_WRITE_RE ));189 //(*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE ))(*(out_MEMORY_OUT_NUM_REG_RE ));190 //(*(_Load_store_unit->out_MEMORY_OUT_DATA_RE ))(*(out_MEMORY_OUT_DATA_RE ));199 (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE ))(*(out_MEMORY_OUT_WRITE_RE )); 200 (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE ))(*(out_MEMORY_OUT_NUM_REG_RE )); 201 (*(_Load_store_unit->out_MEMORY_OUT_DATA_RE ))(*(out_MEMORY_OUT_DATA_RE )); 191 202 (*(_Load_store_unit->out_MEMORY_OUT_EXCEPTION ))(*(out_MEMORY_OUT_EXCEPTION )); 203 (*(_Load_store_unit->out_MEMORY_OUT_NO_SEQUENCE ))(*(out_MEMORY_OUT_NO_SEQUENCE )); 204 (*(_Load_store_unit->out_MEMORY_OUT_ADDRESS ))(*(out_MEMORY_OUT_ADDRESS )); 192 205 193 206 (*(_Load_store_unit->out_DCACHE_REQ_VAL ))(*(out_DCACHE_REQ_VAL )); … … 208 221 (*(_Load_store_unit-> in_DCACHE_RSP_ERROR ))(*( in_DCACHE_RSP_ERROR )); 209 222 210 if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)211 223 { 212 for (uint32_t i=0; i<_param->_ size_load_queue; i++)224 for (uint32_t i=0; i<_param->_nb_bypass_memory; i++) 213 225 { 214 226 (*(_Load_store_unit->out_BYPASS_MEMORY_VAL [i]))(*(out_BYPASS_MEMORY_VAL [i])); … … 448 460 in_MEMORY_IN_TYPE ->write (fifo_request.top()._type ); 449 461 in_MEMORY_IN_STORE_QUEUE_PTR_WRITE->write (fifo_request.top()._store_queue_ptr_write); 462 if (_param->_have_port_load_queue_ptr) 450 463 in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ->write (fifo_request.top()._load_queue_ptr_write ); 451 464 in_MEMORY_IN_IMMEDIAT ->write (fifo_request.top()._immediat ); … … 533 546 TEST(Tcontext_t , out_MEMORY_OUT_FRONT_END_ID ->read(), tab_request[packet_id]._front_end_id ); 534 547 TEST(Tcontext_t , out_MEMORY_OUT_OOO_ENGINE_ID->read(), tab_request[packet_id]._ooo_engine_id); 548 // TEST(Toperation_t , out_MEMORY_OUT_OPERATION ->read(), tab_request[packet_id]._operation ); 549 TEST(Ttype_t , out_MEMORY_OUT_TYPE ->read(), TYPE_MEMORY ); 535 550 536 551 if (is_operation_memory_load (tab_request[packet_id]._operation)) … … 721 736 delete in_MEMORY_IN_STORE_QUEUE_PTR_WRITE; 722 737 delete in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ; 723 //delete in_MEMORY_IN_HAS_IMMEDIAT;738 delete in_MEMORY_IN_HAS_IMMEDIAT; 724 739 delete in_MEMORY_IN_IMMEDIAT ; 725 740 delete in_MEMORY_IN_DATA_RA ; 726 741 delete in_MEMORY_IN_DATA_RB ; 727 //delete in_MEMORY_IN_DATA_RC ;728 //delete in_MEMORY_IN_WRITE_RD ;742 delete in_MEMORY_IN_DATA_RC ; 743 delete in_MEMORY_IN_WRITE_RD ; 729 744 delete in_MEMORY_IN_NUM_REG_RD ; 730 //delete in_MEMORY_IN_WRITE_RE ;731 //delete in_MEMORY_IN_NUM_REG_RE ;745 delete in_MEMORY_IN_WRITE_RE ; 746 delete in_MEMORY_IN_NUM_REG_RE ; 732 747 733 748 delete out_MEMORY_OUT_VAL ; … … 737 752 delete out_MEMORY_OUT_OOO_ENGINE_ID; 738 753 delete out_MEMORY_OUT_PACKET_ID ; 754 // delete out_MEMORY_OUT_OPERATION ; 755 delete out_MEMORY_OUT_TYPE ; 739 756 delete out_MEMORY_OUT_WRITE_RD ; 740 757 delete out_MEMORY_OUT_NUM_REG_RD; 741 758 delete out_MEMORY_OUT_DATA_RD ; 742 //delete out_MEMORY_OUT_WRITE_RE ;743 //delete out_MEMORY_OUT_NUM_REG_RE;744 //delete out_MEMORY_OUT_DATA_RE ;759 delete out_MEMORY_OUT_WRITE_RE ; 760 delete out_MEMORY_OUT_NUM_REG_RE; 761 delete out_MEMORY_OUT_DATA_RE ; 745 762 delete out_MEMORY_OUT_EXCEPTION ; 763 delete out_MEMORY_OUT_NO_SEQUENCE; 764 delete out_MEMORY_OUT_ADDRESS ; 746 765 747 766 delete out_DCACHE_REQ_VAL ; … … 760 779 delete in_DCACHE_RSP_ERROR ; 761 780 762 if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)763 781 { 764 782 delete [] out_BYPASS_MEMORY_VAL ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h
r76 r78 5 5 * $Id$ 6 6 * 7 * [ 7 * [ Description ] 8 8 * 9 9 * Ce composant peut être amélioré en placant deux ptr de lecture au lieu d'un : un pour l'accès au cache et un pour le commit … … 46 46 #endif 47 47 { 48 // -----[ 48 // -----[ fields ]---------------------------------------------------- 49 49 // Parameters 50 50 protected : const std::string _name; … … 53 53 54 54 #ifdef STATISTICS 55 p rivate: Stat * _stat;55 public : Stat * _stat; 56 56 57 57 private : counter_t * _stat_use_store_queue; … … 83 83 84 84 #ifdef SYSTEMC 85 // ~~~~~[ 85 // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 86 86 // Interface 87 87 public : SC_CLOCK * in_CLOCK ; 88 88 public : SC_IN (Tcontrol_t) * in_NRESET ; 89 89 90 // ~~~~~[ 90 // ~~~~~[ Interface "memory_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 91 91 public : SC_IN (Tcontrol_t ) * in_MEMORY_IN_VAL ; 92 92 public : SC_OUT(Tcontrol_t ) * out_MEMORY_IN_ACK ; … … 96 96 public : SC_IN (Tpacket_t ) * in_MEMORY_IN_PACKET_ID ; 97 97 public : SC_IN (Toperation_t ) * in_MEMORY_IN_OPERATION ; 98 //public : SC_IN (Ttype_t ) * in_MEMORY_IN_TYPE ;98 public : SC_IN (Ttype_t ) * in_MEMORY_IN_TYPE ; 99 99 public : SC_IN (Tlsq_ptr_t ) * in_MEMORY_IN_STORE_QUEUE_PTR_WRITE; 100 100 public : SC_IN (Tlsq_ptr_t ) * in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ; 101 //public : SC_IN (Tcontrol_t ) * in_MEMORY_IN_HAS_IMMEDIAT;101 public : SC_IN (Tcontrol_t ) * in_MEMORY_IN_HAS_IMMEDIAT; 102 102 public : SC_IN (Tgeneral_data_t ) * in_MEMORY_IN_IMMEDIAT ; // memory address 103 103 public : SC_IN (Tgeneral_data_t ) * in_MEMORY_IN_DATA_RA ; // memory address 104 104 public : SC_IN (Tgeneral_data_t ) * in_MEMORY_IN_DATA_RB ; // data (store) 105 //public : SC_IN (Tspecial_data_t ) * in_MEMORY_IN_DATA_RC ;106 //public : SC_IN (Tcontrol_t ) * in_MEMORY_IN_WRITE_RD ; // = (operation==load)105 public : SC_IN (Tspecial_data_t ) * in_MEMORY_IN_DATA_RC ; 106 public : SC_IN (Tcontrol_t ) * in_MEMORY_IN_WRITE_RD ; // = (operation==load) 107 107 public : SC_IN (Tgeneral_address_t) * in_MEMORY_IN_NUM_REG_RD ; // destination (load) 108 //public : SC_IN (Tcontrol_t ) * in_MEMORY_IN_WRITE_RE ;109 //public : SC_IN (Tspecial_address_t) * in_MEMORY_IN_NUM_REG_RE ;110 111 // ~~~~~[ 108 public : SC_IN (Tcontrol_t ) * in_MEMORY_IN_WRITE_RE ; 109 public : SC_IN (Tspecial_address_t) * in_MEMORY_IN_NUM_REG_RE ; 110 111 // ~~~~~[ Interface "memory_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 112 112 public : SC_OUT(Tcontrol_t ) * out_MEMORY_OUT_VAL ; 113 113 public : SC_IN (Tcontrol_t ) * in_MEMORY_OUT_ACK ; … … 116 116 public : SC_OUT(Tcontext_t ) * out_MEMORY_OUT_OOO_ENGINE_ID; 117 117 public : SC_OUT(Tpacket_t ) * out_MEMORY_OUT_PACKET_ID ; 118 //public : SC_OUT(Toperation_t ) * out_MEMORY_OUT_OPERATION ; 119 public : SC_OUT(Ttype_t ) * out_MEMORY_OUT_TYPE ; 118 120 public : SC_OUT(Tcontrol_t ) * out_MEMORY_OUT_WRITE_RD ; // = (operation==load) 119 121 public : SC_OUT(Tgeneral_address_t) * out_MEMORY_OUT_NUM_REG_RD; // destination (load) 120 122 public : SC_OUT(Tgeneral_data_t ) * out_MEMORY_OUT_DATA_RD ; // data (load) 121 //public : SC_OUT(Tcontrol_t ) * out_MEMORY_OUT_WRITE_RE ;122 //public : SC_OUT(Tspecial_address_t) * out_MEMORY_OUT_NUM_REG_RE;123 //public : SC_OUT(Tspecial_data_t ) * out_MEMORY_OUT_DATA_RE ;123 public : SC_OUT(Tcontrol_t ) * out_MEMORY_OUT_WRITE_RE ; 124 public : SC_OUT(Tspecial_address_t) * out_MEMORY_OUT_NUM_REG_RE; 125 public : SC_OUT(Tspecial_data_t ) * out_MEMORY_OUT_DATA_RE ; 124 126 public : SC_OUT(Texception_t ) * out_MEMORY_OUT_EXCEPTION ; 125 126 // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 127 public : SC_OUT(Tcontrol_t ) * out_MEMORY_OUT_NO_SEQUENCE; 128 public : SC_OUT(Tgeneral_data_t ) * out_MEMORY_OUT_ADDRESS ; 129 130 131 // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 127 132 public : SC_OUT(Tcontrol_t ) * out_DCACHE_REQ_VAL ; 128 133 public : SC_IN (Tcontrol_t ) * in_DCACHE_REQ_ACK ; … … 133 138 public : SC_OUT(Tdcache_data_t ) * out_DCACHE_REQ_WDATA ; 134 139 135 // ~~~~~[ Interface "dcache_rsp"]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~140 // ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 136 141 public : SC_IN (Tcontrol_t ) * in_DCACHE_RSP_VAL ; 137 142 public : SC_OUT(Tcontrol_t ) * out_DCACHE_RSP_ACK ; … … 141 146 public : SC_IN (Tdcache_error_t ) * in_DCACHE_RSP_ERROR ; 142 147 143 // ~~~~~[ 148 // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 144 149 public : SC_OUT(Tcontrol_t ) ** out_BYPASS_MEMORY_VAL ; 145 150 public : SC_OUT(Tcontext_t ) ** out_BYPASS_MEMORY_OOO_ENGINE_ID; … … 147 152 public : SC_OUT(Tgeneral_data_t ) ** out_BYPASS_MEMORY_DATA ; 148 153 149 // ~~~~~[ 154 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 150 155 protected : Tstore_queue_entry_t * _store_queue; 151 156 protected : Tload_queue_entry_t * _load_queue; … … 160 165 public : void (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Load_store_unit::*function_genMealy_retire) (void); 161 166 162 // ~~~~~[ 163 164 // ~~~~~[ 167 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 168 169 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 165 170 166 171 // Registers … … 182 187 #endif 183 188 184 // -----[ 189 // -----[ methods ]--------------------------------------------------- 185 190 186 191 #ifdef SYSTEMC -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h
r77 r78 32 32 public : const uint32_t _nb_port_check ; 33 33 public : const Tspeculative_load_t _speculative_load ; 34 public : const uint32_t _nb_bypass_memory ; 34 35 //public : const uint32_t _nb_cache_port ; 35 36 public : const uint32_t _nb_context ; … … 38 39 public : const uint32_t _nb_packet ; 39 40 public : const uint32_t _size_general_data ; 41 public : const uint32_t _size_special_data ; 40 42 public : const uint32_t _nb_general_register ; 43 public : const uint32_t _nb_special_register ; 41 44 42 45 public : const uint32_t _size_address_store_queue ; … … 48 51 public : const uint32_t _size_packet_id ; 49 52 public : const uint32_t _size_general_register ; 53 public : const uint32_t _size_special_register ; 50 54 public : const uint32_t _size_dcache_context_id ; 51 55 public : const uint32_t _size_dcache_packet_id ; … … 56 60 public : const bool _have_port_packet_id ; 57 61 public : const bool _have_port_dcache_context_id ; 62 public : const bool _have_port_load_queue_ptr ; 58 63 59 64 public : const Tdcache_address_t _mask_address_lsb ; … … 66 71 uint32_t nb_port_check , 67 72 Tspeculative_load_t speculative_load , 73 uint32_t nb_bypass_memory , 68 74 uint32_t nb_context , 69 75 uint32_t nb_front_end , … … 71 77 uint32_t nb_packet , 72 78 uint32_t size_general_data , 73 uint32_t nb_general_register ); 79 uint32_t size_special_data , 80 uint32_t nb_general_register , 81 uint32_t nb_special_register ); 74 82 75 83 public : Parameters (Parameters & param) ; 76 84 public : ~Parameters () ; 77 85 78 public : std::stringmsg_error (void);86 public : Parameters_test msg_error (void); 79 87 80 88 public : std::string print (uint32_t depth); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h
r71 r78 33 33 typedef enum 34 34 { 35 NO_SPECULATIVE_LOAD ,//each load wait all previous store before the data cache access36 SPECULATIVE_LOAD_ACCESS,//each load wait all previous store before the commiting37 SPECULATIVE_LOAD_COMMIT,//each load commit the result before the end of dependence's check38 SPECULATIVE_LOAD_BYPASS//each load bypass the result before the end of dependence's check35 NO_SPECULATIVE_LOAD //each load wait all previous store before the data cache access 36 ,SPECULATIVE_LOAD_ACCESS //each load wait all previous store before the commiting 37 ,SPECULATIVE_LOAD_COMMIT //each load commit the result before the end of dependence's check 38 //,SPECULATIVE_LOAD_BYPASS //each load bypass the result before the end of dependence's check 39 39 } Tspeculative_load_t; 40 40 … … 212 212 case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_ACCESS : return "speculative_load_access"; break; 213 213 case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_COMMIT : return "speculative_load_commit"; break; 214 case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS : return "speculative_load_bypass"; break;214 // case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS : return "speculative_load_bypass"; break; 215 215 default : return "" ; break; 216 216 } … … 228 228 (x.compare("speculative_load_commit") == 0)) 229 229 return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_COMMIT; 230 if ( (x.compare("3") == 0) or231 (x.compare("speculative_load_bypass") == 0))232 return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS;230 // if ( (x.compare("3") == 0) or 231 // (x.compare("speculative_load_bypass") == 0)) 232 // return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::SPECULATIVE_LOAD_BYPASS; 233 233 234 234 throw (ErrorMorpheo ("<fromString> : Unknow string : \""+x+"\"")); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit.cpp
r71 r78 69 69 case NO_SPECULATIVE_LOAD : 70 70 case SPECULATIVE_LOAD_ACCESS : 71 71 //case SPECULATIVE_LOAD_BYPASS : 72 72 default : 73 73 { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp
r75 r78 72 72 in_MEMORY_IN_PACKET_ID = interface->set_signal_in <Tpacket_t > ("packet_id" ,_param->_size_packet_id ); 73 73 in_MEMORY_IN_OPERATION = interface->set_signal_in <Toperation_t > ("operation" ,_param->_size_operation ); 74 in_MEMORY_IN_TYPE = interface->set_signal_in <Ttype_t > ("type" ,_param->_size_type ); 74 75 in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t > ("store_queue_ptr_write" ,_param->_size_address_store_queue+1); // +1 cf load_queue usage 76 if (_param->_have_port_load_queue_ptr) 75 77 in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t > ("load_queue_ptr_write" ,_param->_size_address_load_queue ); 76 //in_MEMORY_IN_HAS_IMMEDIAT = interface->set_signal_in <Tcontrol_t > ("has_immediat",1 );78 in_MEMORY_IN_HAS_IMMEDIAT = interface->set_signal_in <Tcontrol_t > ("has_immediat",1 ); 77 79 in_MEMORY_IN_IMMEDIAT = interface->set_signal_in <Tgeneral_data_t > ("immediat" ,_param->_size_general_data ); 78 80 in_MEMORY_IN_DATA_RA = interface->set_signal_in <Tgeneral_data_t > ("data_ra" ,_param->_size_general_data ); 79 81 in_MEMORY_IN_DATA_RB = interface->set_signal_in <Tgeneral_data_t > ("data_rb" ,_param->_size_general_data ); 80 //in_MEMORY_IN_DATA_RC = interface->set_signal_in <Tspecial_data_t > ("data_rc" ,_param->_size_special_data );81 //in_MEMORY_IN_WRITE_RD = interface->set_signal_in <Tcontrol_t > ("write_rd" ,1 );82 in_MEMORY_IN_DATA_RC = interface->set_signal_in <Tspecial_data_t > ("data_rc" ,_param->_size_special_data ); 83 in_MEMORY_IN_WRITE_RD = interface->set_signal_in <Tcontrol_t > ("write_rd" ,1 ); 82 84 in_MEMORY_IN_NUM_REG_RD = interface->set_signal_in <Tgeneral_address_t> ("num_reg_rd" ,1 ); 83 //in_MEMORY_IN_WRITE_RE = interface->set_signal_in <Tcontrol_t > ("write_re" ,1 );84 //in_MEMORY_IN_NUM_REG_RE = interface->set_signal_in <Tspecial_address_t> ("num_reg_re" ,1 );85 in_MEMORY_IN_WRITE_RE = interface->set_signal_in <Tcontrol_t > ("write_re" ,1 ); 86 in_MEMORY_IN_NUM_REG_RE = interface->set_signal_in <Tspecial_address_t> ("num_reg_re" ,1 ); 85 87 } 86 88 … … 105 107 if (_param->_have_port_packet_id) 106 108 out_MEMORY_OUT_PACKET_ID = interface->set_signal_out <Tpacket_t > ("packet_id" ,_param->_size_packet_id ); 109 // out_MEMORY_OUT_OPERATION = interface->set_signal_out <Toperation_t > ("operation" ,_param->_size_operation ); 110 out_MEMORY_OUT_TYPE = interface->set_signal_out <Ttype_t > ("type" ,_param->_size_type ); 107 111 out_MEMORY_OUT_WRITE_RD = interface->set_signal_out <Tcontrol_t > ("write_rd" ,1 ); 108 112 out_MEMORY_OUT_NUM_REG_RD = interface->set_signal_out <Tgeneral_address_t> ("num_reg_rd" ,_param->_size_general_register ); 109 113 out_MEMORY_OUT_DATA_RD = interface->set_signal_out <Tgeneral_data_t > ("data_rd" ,_param->_size_general_data ); 110 // out_MEMORY_OUT_WRITE_RE = interface->set_signal_out <Tcontrol_t > ("write_rd" ,1 );111 //out_MEMORY_OUT_NUM_REG_RE = interface->set_signal_out <Tspecial_address_t> ("num_reg_re" ,_param->_size_general_register );112 //out_MEMORY_OUT_DATA_RE = interface->set_signal_out <Tspecial_data_t > ("data_re" ,_param->_size_general_data );114 out_MEMORY_OUT_WRITE_RE = interface->set_signal_out <Tcontrol_t > ("write_re" ,1 ); 115 out_MEMORY_OUT_NUM_REG_RE = interface->set_signal_out <Tspecial_address_t> ("num_reg_re" ,_param->_size_general_register ); 116 out_MEMORY_OUT_DATA_RE = interface->set_signal_out <Tspecial_data_t > ("data_re" ,_param->_size_general_data ); 113 117 out_MEMORY_OUT_EXCEPTION = interface->set_signal_out <Texception_t > ("exception" ,_param->_size_exception ); 118 out_MEMORY_OUT_NO_SEQUENCE = interface->set_signal_out <Tcontrol_t > ("no_sequence" ,1 ); 119 out_MEMORY_OUT_ADDRESS = interface->set_signal_out <Tgeneral_data_t > ("address" ,_param->_size_general_data ); 114 120 } 115 121 … … 153 159 // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 154 160 155 161 // if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS) 156 162 { 157 out_BYPASS_MEMORY_VAL = new SC_OUT(Tcontrol_t ) * [_param->_ size_load_queue];163 out_BYPASS_MEMORY_VAL = new SC_OUT(Tcontrol_t ) * [_param->_nb_bypass_memory]; 158 164 if (_param->_have_port_ooo_engine_id) 159 out_BYPASS_MEMORY_OOO_ENGINE_ID= new SC_OUT(Tcontext_t ) * [_param->_ size_load_queue];160 out_BYPASS_MEMORY_NUM_REG = new SC_OUT(Tgeneral_address_t) * [_param->_ size_load_queue];161 out_BYPASS_MEMORY_DATA = new SC_OUT(Tgeneral_data_t ) * [_param->_ size_load_queue];165 out_BYPASS_MEMORY_OOO_ENGINE_ID= new SC_OUT(Tcontext_t ) * [_param->_nb_bypass_memory]; 166 out_BYPASS_MEMORY_NUM_REG = new SC_OUT(Tgeneral_address_t) * [_param->_nb_bypass_memory]; 167 out_BYPASS_MEMORY_DATA = new SC_OUT(Tgeneral_data_t ) * [_param->_nb_bypass_memory]; 162 168 163 for (uint32_t i=0; i<_param->_ size_load_queue; i++)169 for (uint32_t i=0; i<_param->_nb_bypass_memory; i++) 164 170 { 165 171 Interface_fifo * interface = _interfaces->set_interface("memory_out" -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp
r71 r78 44 44 delete in_MEMORY_IN_PACKET_ID ; 45 45 delete in_MEMORY_IN_OPERATION ; 46 delete in_MEMORY_IN_TYPE ; 46 47 delete in_MEMORY_IN_STORE_QUEUE_PTR_WRITE; 48 if (_param->_have_port_load_queue_ptr) 47 49 delete in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ; 48 //delete in_MEMORY_IN_HAS_IMMEDIAT;50 delete in_MEMORY_IN_HAS_IMMEDIAT; 49 51 delete in_MEMORY_IN_IMMEDIAT ; 50 52 delete in_MEMORY_IN_DATA_RA ; 51 53 delete in_MEMORY_IN_DATA_RB ; 52 //delete in_MEMORY_IN_DATA_RC ;53 //delete in_MEMORY_IN_WRITE_RD ;54 delete in_MEMORY_IN_DATA_RC ; 55 delete in_MEMORY_IN_WRITE_RD ; 54 56 delete in_MEMORY_IN_NUM_REG_RD ; 55 //delete in_MEMORY_IN_WRITE_RE ;56 //delete in_MEMORY_IN_NUM_REG_RE ;57 delete in_MEMORY_IN_WRITE_RE ; 58 delete in_MEMORY_IN_NUM_REG_RE ; 57 59 58 60 delete out_MEMORY_OUT_VAL ; … … 66 68 if (_param->_have_port_packet_id) 67 69 delete out_MEMORY_OUT_PACKET_ID ; 70 // delete out_MEMORY_OUT_OPERATION ; 71 delete out_MEMORY_OUT_TYPE ; 68 72 delete out_MEMORY_OUT_WRITE_RD ; 69 73 delete out_MEMORY_OUT_NUM_REG_RD; 70 74 delete out_MEMORY_OUT_DATA_RD ; 71 //delete out_MEMORY_OUT_WRITE_RE ;72 //delete out_MEMORY_OUT_NUM_REG_RE;73 //delete out_MEMORY_OUT_DATA_RE ;75 delete out_MEMORY_OUT_WRITE_RE ; 76 delete out_MEMORY_OUT_NUM_REG_RE; 77 delete out_MEMORY_OUT_DATA_RE ; 74 78 delete out_MEMORY_OUT_EXCEPTION ; 79 delete out_MEMORY_OUT_NO_SEQUENCE; 80 delete out_MEMORY_OUT_ADDRESS ; 75 81 76 82 delete out_DCACHE_REQ_VAL ; … … 91 97 delete in_DCACHE_RSP_ERROR ; 92 98 93 if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS) 94 { 95 delete [] out_BYPASS_MEMORY_VAL ; 96 if (_param->_have_port_ooo_engine_id) 97 delete [] out_BYPASS_MEMORY_OOO_ENGINE_ID; 98 delete [] out_BYPASS_MEMORY_NUM_REG ; 99 delete [] out_BYPASS_MEMORY_DATA ; 100 } 99 delete [] out_BYPASS_MEMORY_VAL ; 100 if (_param->_have_port_ooo_engine_id) 101 delete [] out_BYPASS_MEMORY_OOO_ENGINE_ID; 102 delete [] out_BYPASS_MEMORY_NUM_REG ; 103 delete [] out_BYPASS_MEMORY_DATA ; 101 104 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 102 105 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp
r71 r78 120 120 if (_param->_have_port_packet_id) 121 121 PORT_WRITE(out_MEMORY_OUT_PACKET_ID , memory_out_packet_id ); 122 // PORT_WRITE(out_MEMORY_OUT_OPERATION , memory_out_operation ); 123 PORT_WRITE(out_MEMORY_OUT_TYPE , TYPE_MEMORY ); 122 124 PORT_WRITE(out_MEMORY_OUT_WRITE_RD , memory_out_write_rd ); 123 125 PORT_WRITE(out_MEMORY_OUT_NUM_REG_RD , memory_out_num_reg_rd ); … … 126 128 // PORT_WRITE(out_MEMORY_OUT_NUM_REG_RE , memory_out_num_reg_re ); 127 129 // PORT_WRITE(out_MEMORY_OUT_DATA_RE , memory_out_data_re ); 130 PORT_WRITE(out_MEMORY_OUT_WRITE_RE , 0); 131 PORT_WRITE(out_MEMORY_OUT_NUM_REG_RE , 0); 132 PORT_WRITE(out_MEMORY_OUT_DATA_RE , 0); 128 133 PORT_WRITE(out_MEMORY_OUT_EXCEPTION , memory_out_exception ); 129 134 PORT_WRITE(out_MEMORY_OUT_NO_SEQUENCE , 0); 135 PORT_WRITE(out_MEMORY_OUT_ADDRESS , 0); 130 136 // ~~~~~[ Interface "dache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 131 137 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
r75 r78 265 265 // others in speculation_access_queue 266 266 267 #ifdef DEBUG_TEST 268 if (PORT_READ(in_MEMORY_IN_TYPE) != TYPE_MEMORY) 269 throw ERRORMORPHEO(FUNCTION,"The type is different at 'TYPE_MEMORY'"); 270 #endif 267 271 Toperation_t operation = PORT_READ(in_MEMORY_IN_OPERATION); 268 272 Tgeneral_data_t address = (PORT_READ(in_MEMORY_IN_IMMEDIAT) + … … 376 380 _store_queue [index]._packet_id = (not _param->_have_port_packet_id )?0:PORT_READ(in_MEMORY_IN_PACKET_ID ); 377 381 _store_queue [index]._operation = operation; 378 _store_queue [index]._load_queue_ptr_write = PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE);382 _store_queue [index]._load_queue_ptr_write = (not _param->_have_port_load_queue_ptr)?0:PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE); 379 383 _store_queue [index]._address = address; 380 384 … … 415 419 416 420 _speculative_access_queue [index]._operation = operation; 417 _speculative_access_queue [index]._load_queue_ptr_write = PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE);421 _speculative_access_queue [index]._load_queue_ptr_write = (not _param->_have_port_load_queue_ptr)?0:PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE); 418 422 _speculative_access_queue [index]._store_queue_ptr_write= PORT_READ(in_MEMORY_IN_STORE_QUEUE_PTR_WRITE); 419 423 _speculative_access_queue [index]._address = address; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters.cpp
r77 r78 25 25 uint32_t nb_port_check , 26 26 Tspeculative_load_t speculative_load , 27 uint32_t nb_bypass_memory , 27 28 uint32_t nb_context , 28 29 uint32_t nb_front_end , … … 30 31 uint32_t nb_packet , 31 32 uint32_t size_general_data , 32 uint32_t nb_general_register ): 33 uint32_t size_special_data , 34 uint32_t nb_general_register , 35 uint32_t nb_special_register ): 33 36 _size_store_queue (size_store_queue ), 34 37 _size_load_queue (size_load_queue ), … … 36 39 _nb_port_check (nb_port_check ), 37 40 _speculative_load (speculative_load ), 41 _nb_bypass_memory (nb_bypass_memory ), 38 42 _nb_context (nb_context ), 39 43 _nb_front_end (nb_front_end ), … … 41 45 _nb_packet (nb_packet ), 42 46 _size_general_data (size_general_data ), 47 _size_special_data (size_special_data ), 43 48 _nb_general_register (nb_general_register ), 49 _nb_special_register (nb_special_register ), 44 50 45 51 _size_address_store_queue (log2(size_store_queue )), … … 52 58 _size_packet_id (log2(nb_packet )), 53 59 _size_general_register (log2(nb_general_register)), 60 _size_special_register (log2(nb_special_register)), 54 61 _size_dcache_context_id (_size_context_id + _size_front_end_id + _size_ooo_engine_id), 55 62 _size_dcache_packet_id ((log2((size_store_queue>size_load_queue)?size_store_queue:size_load_queue))+1), … … 60 67 _have_port_packet_id (_size_packet_id >0), 61 68 _have_port_dcache_context_id (_size_dcache_context_id>0), 69 _have_port_load_queue_ptr (_size_load_queue>1), 62 70 63 71 _mask_address_lsb (gen_mask<Tdcache_address_t>(log2(size_general_data/8))), … … 77 85 _nb_port_check (param._nb_port_check ), 78 86 _speculative_load (param._speculative_load ), 87 _nb_bypass_memory (param._nb_bypass_memory ), 79 88 _nb_context (param._nb_context ), 80 89 _nb_front_end (param._nb_front_end ), … … 82 91 _nb_packet (param._nb_packet ), 83 92 _size_general_data (param._size_general_data ), 93 _size_special_data (param._size_special_data ), 84 94 _nb_general_register (param._nb_general_register ), 95 _nb_special_register (param._nb_special_register ), 85 96 86 97 _size_address_store_queue (param._size_address_store_queue ), … … 93 104 _size_packet_id (param._size_packet_id ), 94 105 _size_general_register (param._size_general_register ), 106 _size_special_register (param._size_special_register ), 95 107 _size_dcache_context_id (param._size_dcache_context_id ), 96 108 _size_dcache_packet_id (param._size_dcache_packet_id ), … … 100 112 _have_port_ooo_engine_id (param._have_port_ooo_engine_id), 101 113 _have_port_packet_id (param._have_port_packet_id ), 102 103 114 _have_port_dcache_context_id(param._have_port_dcache_context_id), 115 _have_port_load_queue_ptr(param._have_port_load_queue_ptr), 104 116 105 117 _mask_address_lsb (param._mask_address_lsb), -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_msg_error.cpp
r71 r78 21 21 #undef FUNCTION 22 22 #define FUNCTION "Load_store_unit::msg_error" 23 std::stringParameters::msg_error(void)23 Parameters_test Parameters::msg_error(void) 24 24 { 25 25 log_printf(FUNC,Load_store_unit,FUNCTION,"Begin"); 26 26 27 std::string msg = "";27 Parameters_test test("Load_store_unit"); 28 28 29 29 switch (_speculative_load) … … 31 31 case SPECULATIVE_LOAD_COMMIT : 32 32 { 33 if (not (_nb_bypass_memory == 0)) 34 test.error("Bypass memory is not supported. Please wait a next revision."); 35 33 36 break; 34 37 } 35 38 case NO_SPECULATIVE_LOAD : 36 39 case SPECULATIVE_LOAD_ACCESS : 37 case SPECULATIVE_LOAD_BYPASS :40 // case SPECULATIVE_LOAD_BYPASS : 38 41 default : 39 42 { 40 msg += " - Speculative load scheme is not supported : " +toString(_speculative_load); 43 if (not (_nb_bypass_memory == 0)) 44 test.error("In the load scheme '"+toString(_speculative_load)+"', they have none bypass."); 45 46 test.error("Speculative load scheme '"+toString(_speculative_load)+"' is not supported. Please wait a next revision."); 41 47 break; 42 48 } 43 49 } 44 50 45 return msg; 51 if (not (_size_store_queue >= 2)) 52 test.error("Store queue must have at less two slot."); 53 54 if (not (_nb_bypass_memory <= _size_load_queue)) 55 test.error("Bypass number must be less than load_queue's size."); 46 56 47 57 log_printf(FUNC,Load_store_unit,FUNCTION,"End"); 58 59 return test; 60 48 61 }; 49 62 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_print.cpp
r77 r78 33 33 xml.singleton_begin("nb_port_check "); xml.attribut("value",toString(_nb_port_check )); xml.singleton_end(); 34 34 xml.singleton_begin("speculative_load "); xml.attribut("value",toString(_speculative_load )); xml.singleton_end(); 35 xml.singleton_begin("nb_bypass_memory "); xml.attribut("value",toString(_nb_bypass_memory )); xml.singleton_end(); 35 36 xml.singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context )); xml.singleton_end(); 36 37 xml.singleton_begin("nb_front_end "); xml.attribut("value",toString(_nb_front_end )); xml.singleton_end(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/config0.cfg
r77 r78 12 12 2 2 *2 # nb_spr_write 13 13 4 4 *2 # size_store_queue 14 4 4 *2# size_load_queue14 1 4 *4 # size_load_queue -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/src/test.cpp
r76 r78 231 231 (*(_Read_queue-> in_READ_QUEUE_IN_TYPE )) (*(READ_QUEUE_IN_TYPE )); 232 232 (*(_Read_queue-> in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE)) (*(READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE)); 233 if (_param->_have_port_load_queue_ptr) 233 234 (*(_Read_queue-> in_READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE )) (*(READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE )); 234 235 (*(_Read_queue-> in_READ_QUEUE_IN_HAS_IMMEDIAT )) (*(READ_QUEUE_IN_HAS_IMMEDIAT )); … … 258 259 (*(_Read_queue->out_READ_QUEUE_OUT_TYPE )) (*(READ_QUEUE_OUT_TYPE )); 259 260 (*(_Read_queue->out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE)) (*(READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE)); 261 if (_param->_have_port_load_queue_ptr) 260 262 (*(_Read_queue->out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE )) (*(READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE )); 261 263 (*(_Read_queue->out_READ_QUEUE_OUT_HAS_IMMEDIAT )) (*(READ_QUEUE_OUT_HAS_IMMEDIAT )); … … 417 419 READ_QUEUE_IN_TYPE ->write(0); 418 420 READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE->write(0); 421 if (_param->_have_port_load_queue_ptr) 419 422 READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE ->write(0); 420 423 READ_QUEUE_IN_HAS_IMMEDIAT->write(0); … … 592 595 delete READ_QUEUE_IN_TYPE ; 593 596 delete READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE; 597 if (_param->_have_port_load_queue_ptr) 594 598 delete READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE ; 595 599 delete READ_QUEUE_IN_HAS_IMMEDIAT ; … … 619 623 delete READ_QUEUE_OUT_TYPE ; 620 624 delete READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE; 625 if (_param->_have_port_load_queue_ptr) 621 626 delete READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE ; 622 627 delete READ_QUEUE_OUT_HAS_IMMEDIAT; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Parameters.h
r77 r78 55 55 public : const bool _have_port_ooo_engine_id; 56 56 public : const bool _have_port_rob_id ; 57 public : const bool _have_port_load_queue_ptr; 57 58 58 59 public : const uint32_t _size_internal_queue; … … 76 77 public : ~Parameters () ; 77 78 78 public : std::stringmsg_error (void);79 public : Parameters_test msg_error (void); 79 80 80 81 public : std::string print (uint32_t depth); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters.cpp
r77 r78 58 58 _have_port_ooo_engine_id (_size_ooo_engine_id > 0), 59 59 _have_port_rob_id (_size_rob_id > 0), 60 _have_port_load_queue_ptr(_size_load_queue > 1), 60 61 61 62 _size_internal_queue ( _size_context_id //_context_id … … 116 117 _have_port_ooo_engine_id (param._have_port_ooo_engine_id), 117 118 _have_port_rob_id (param._have_port_rob_id ), 119 _have_port_load_queue_ptr(param._have_port_load_queue_ptr), 118 120 119 121 _size_internal_queue (param._size_internal_queue ) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters_msg_error.cpp
r75 r78 19 19 20 20 21 std::stringParameters::msg_error(void)21 Parameters_test Parameters::msg_error(void) 22 22 { 23 23 log_printf(FUNC,Read_queue,"msg_error","Begin"); 24 24 25 std::string msg = ""; 26 27 // if (_size_queue < 2) 28 // { 29 // msg += " - The read_queue must be have less a depth of 2"; 30 // msg += " * size_queue : " + toString(_size_queue) + "\n"; 31 // } 25 Parameters_test test ("Read_queue"); 32 26 33 27 if (_nb_type < 2) 34 { 35 msg += " - The number of type must be > 1"; 36 } 28 test.error("The number of type must be > 1"); 29 37 30 if (_nb_operation < 2) 38 { 39 msg += " - The number of operation must be > 1"; 40 } 41 42 43 return msg; 31 test.error("The number of operation must be > 1"); 44 32 45 33 log_printf(FUNC,Read_queue,"msg_error","End"); 34 35 return test; 46 36 }; 47 37 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp
r76 r78 71 71 in_READ_QUEUE_IN_TYPE = interface->set_signal_in <Ttype_t > ("type" ,_param->_size_type ); 72 72 in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t> ("store_queue_ptr_write", log2(_param->_size_store_queue)); 73 if (_param->_have_port_load_queue_ptr) 73 74 in_READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t> ("load_queue_ptr_write" , log2(_param->_size_load_queue )); 74 75 in_READ_QUEUE_IN_HAS_IMMEDIAT = interface->set_signal_in <Tcontrol_t > ("has_immediat",1 ); … … 110 111 out_READ_QUEUE_OUT_TYPE = interface->set_signal_out <Ttype_t > ("type" ,_param->_size_type ); 111 112 out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE = interface->set_signal_out <Tlsq_ptr_t> ("store_queue_ptr_write", log2(_param->_size_store_queue)); 113 if (_param->_have_port_load_queue_ptr) 112 114 out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE = interface->set_signal_out <Tlsq_ptr_t> ("load_queue_ptr_write" , log2(_param->_size_load_queue )); 113 115 out_READ_QUEUE_OUT_HAS_IMMEDIAT = interface->set_signal_out <Tcontrol_t > ("has_immediat",1 ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_deallocation.cpp
r76 r78 42 42 delete in_READ_QUEUE_IN_TYPE ; 43 43 delete in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE; 44 if (_param->_have_port_load_queue_ptr) 44 45 delete in_READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE ; 45 46 delete in_READ_QUEUE_IN_HAS_IMMEDIAT ; … … 71 72 delete out_READ_QUEUE_OUT_TYPE ; 72 73 delete out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE; 74 if (_param->_have_port_load_queue_ptr) 73 75 delete out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE ; 74 76 delete out_READ_QUEUE_OUT_HAS_IMMEDIAT ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMoore.cpp
r76 r78 44 44 PORT_WRITE (out_READ_QUEUE_OUT_TYPE , _queue_head->_type ); 45 45 PORT_WRITE (out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE, _queue_head->_store_queue_ptr_write); 46 if (_param->_have_port_load_queue_ptr) 46 47 PORT_WRITE (out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE , _queue_head->_load_queue_ptr_write ); 47 48 PORT_WRITE (out_READ_QUEUE_OUT_HAS_IMMEDIAT, _queue_head->_has_immediat); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp
r76 r78 67 67 entry->_type = PORT_READ(in_READ_QUEUE_IN_TYPE ); 68 68 entry->_store_queue_ptr_write = PORT_READ(in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE); 69 if (_param->_have_port_load_queue_ptr) 69 70 entry->_load_queue_ptr_write = PORT_READ(in_READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE ); 70 71 entry->_has_immediat = PORT_READ(in_READ_QUEUE_IN_HAS_IMMEDIAT); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_write.cfg
r77 r78 15 15 0 0 *2 # nb_bypass_memory 16 16 4 4 *2 # size_store_queue 17 4 4 *2# size_load_queue17 1 4 *4 # size_load_queue -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/test.cpp
r76 r78 216 216 (*(_Reservation_station-> in_INSERT_TYPE )) (*( in_INSERT_TYPE )); 217 217 (*(_Reservation_station-> in_INSERT_STORE_QUEUE_PTR_WRITE)) (*( in_INSERT_STORE_QUEUE_PTR_WRITE)); 218 if (_param->_have_port_load_queue_ptr) 218 219 (*(_Reservation_station-> in_INSERT_LOAD_QUEUE_PTR_WRITE )) (*( in_INSERT_LOAD_QUEUE_PTR_WRITE )); 219 220 (*(_Reservation_station-> in_INSERT_HAS_IMMEDIAT )) (*( in_INSERT_HAS_IMMEDIAT )); … … 251 252 (*(_Reservation_station->out_RETIRE_TYPE [i])) (*(out_RETIRE_TYPE [i])); 252 253 (*(_Reservation_station->out_RETIRE_STORE_QUEUE_PTR_WRITE [i])) (*(out_RETIRE_STORE_QUEUE_PTR_WRITE [i])); 254 if (_param->_have_port_load_queue_ptr) 253 255 (*(_Reservation_station->out_RETIRE_LOAD_QUEUE_PTR_WRITE [i])) (*(out_RETIRE_LOAD_QUEUE_PTR_WRITE [i])); 254 256 (*(_Reservation_station->out_RETIRE_HAS_IMMEDIAT [i])) (*(out_RETIRE_HAS_IMMEDIAT [i])); … … 446 448 in_INSERT_TYPE ->write(0); 447 449 in_INSERT_STORE_QUEUE_PTR_WRITE->write(0); 450 if (_param->_have_port_load_queue_ptr) 448 451 in_INSERT_LOAD_QUEUE_PTR_WRITE ->write(0); 449 452 in_INSERT_HAS_IMMEDIAT->write(0); … … 692 695 delete in_INSERT_TYPE ; 693 696 delete in_INSERT_STORE_QUEUE_PTR_WRITE; 697 if (_param->_have_port_load_queue_ptr) 694 698 delete in_INSERT_LOAD_QUEUE_PTR_WRITE ; 695 699 delete in_INSERT_HAS_IMMEDIAT; … … 725 729 delete [] out_RETIRE_TYPE ; 726 730 delete [] out_RETIRE_STORE_QUEUE_PTR_WRITE; 731 if (_param->_have_port_load_queue_ptr) 727 732 delete [] out_RETIRE_LOAD_QUEUE_PTR_WRITE ; 728 733 delete [] out_RETIRE_HAS_IMMEDIAT; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h
r77 r78 62 62 public : const bool _have_port_ooo_engine_id; 63 63 public : const bool _have_port_rob_id ; 64 public : const bool _have_port_load_queue_ptr; 64 65 65 66 //-----[ methods ]----------------------------------------------------------- … … 84 85 public : ~Parameters () ; 85 86 86 public : std::stringmsg_error (void);87 public : Parameters_test msg_error (void); 87 88 88 89 public : std::string print (uint32_t depth); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters.cpp
r77 r78 63 63 _have_port_front_end_id (_size_front_end_id > 0), 64 64 _have_port_ooo_engine_id (_size_ooo_engine_id > 0), 65 _have_port_rob_id (_size_rob_id > 0) 65 _have_port_rob_id (_size_rob_id > 0), 66 _have_port_load_queue_ptr(_size_load_queue > 1) 66 67 { 67 68 log_printf(FUNC,Reservation_station,FUNCTION,"Begin"); … … 100 101 _have_port_front_end_id (param._have_port_front_end_id ), 101 102 _have_port_ooo_engine_id (param._have_port_ooo_engine_id), 102 _have_port_rob_id (param._have_port_rob_id ) 103 _have_port_rob_id (param._have_port_rob_id ), 104 _have_port_load_queue_ptr(param._have_port_load_queue_ptr) 103 105 { 104 106 log_printf(FUNC,Reservation_station,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters_msg_error.cpp
r75 r78 21 21 #undef FUNCTION 22 22 #define FUNCTION "Reservation_station::msg_error" 23 std::stringParameters::msg_error(void)23 Parameters_test Parameters::msg_error(void) 24 24 { 25 25 log_printf(FUNC,Reservation_station,FUNCTION,"Begin"); 26 26 27 std::string msg = ""; 28 29 // if (_size_queue < 2) 30 // { 31 // msg += " - The reservation_station must be have less a depth of 2"; 32 // msg += " * size_queue : " + toString(_size_queue) + "\n"; 33 // } 27 Parameters_test test ("Reservation_station"); 34 28 35 29 if (_size_queue < _nb_inst_retire) 36 { 37 msg += " - The reservation_station can't have more retire port than entry in the queue."; 38 } 39 40 return msg; 30 test.error("The reservation_station can't have more retire port than entry in the queue."); 41 31 42 32 log_printf(FUNC,Reservation_station,FUNCTION,"End"); 33 34 return test; 43 35 }; 44 36 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp
r76 r78 73 73 in_INSERT_TYPE = interface->set_signal_in <Ttype_t > ("type" ,_param->_size_type ); 74 74 in_INSERT_STORE_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t> ("store_queue_ptr_write" ,log2(_param->_size_store_queue)); 75 if (_param->_have_port_load_queue_ptr) 75 76 in_INSERT_LOAD_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t> ("load_queue_ptr_write" ,log2(_param->_size_load_queue) ); 76 77 in_INSERT_HAS_IMMEDIAT = interface->set_signal_in <Tcontrol_t > ("has_immediat" ,1 ); … … 108 109 out_RETIRE_TYPE = new SC_OUT(Ttype_t ) * [_param->_nb_inst_retire]; 109 110 out_RETIRE_STORE_QUEUE_PTR_WRITE = new SC_OUT(Tlsq_ptr_t ) * [_param->_nb_inst_retire]; 111 if (_param->_have_port_load_queue_ptr) 110 112 out_RETIRE_LOAD_QUEUE_PTR_WRITE = new SC_OUT(Tlsq_ptr_t ) * [_param->_nb_inst_retire]; 111 113 out_RETIRE_HAS_IMMEDIAT = new SC_OUT(Tcontrol_t ) * [_param->_nb_inst_retire]; … … 141 143 out_RETIRE_TYPE [i] = interface->set_signal_out<Ttype_t > ("type" ,_param->_size_type); 142 144 out_RETIRE_STORE_QUEUE_PTR_WRITE [i] = interface->set_signal_out<Tlsq_ptr_t> ("store_queue_ptr_write" ,log2(_param->_size_store_queue)); 145 if (_param->_have_port_load_queue_ptr) 143 146 out_RETIRE_LOAD_QUEUE_PTR_WRITE [i] = interface->set_signal_out<Tlsq_ptr_t> ("load_queue_ptr_write" ,log2(_param->_size_load_queue) ); 144 147 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_deallocation.cpp
r76 r78 44 44 delete in_INSERT_TYPE ; 45 45 delete in_INSERT_STORE_QUEUE_PTR_WRITE; 46 if (_param->_have_port_load_queue_ptr) 46 47 delete in_INSERT_LOAD_QUEUE_PTR_WRITE ; 47 48 delete in_INSERT_HAS_IMMEDIAT ; … … 77 78 delete [] out_RETIRE_TYPE ; 78 79 delete [] out_RETIRE_STORE_QUEUE_PTR_WRITE; 80 if (_param->_have_port_load_queue_ptr) 79 81 delete [] out_RETIRE_LOAD_QUEUE_PTR_WRITE ; 80 82 delete [] out_RETIRE_HAS_IMMEDIAT ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp
r76 r78 102 102 PORT_WRITE(out_RETIRE_TYPE [i],_queue[index_find]._type); 103 103 PORT_WRITE(out_RETIRE_STORE_QUEUE_PTR_WRITE [i],_queue[index_find]._store_queue_ptr_write); 104 if (_param->_have_port_load_queue_ptr) 104 105 PORT_WRITE(out_RETIRE_LOAD_QUEUE_PTR_WRITE [i],_queue[index_find]._load_queue_ptr_write ); 105 106 PORT_WRITE(out_RETIRE_HAS_IMMEDIAT [i],_queue[index_find]._has_immediat); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp
r76 r78 259 259 _queue[index]._type = PORT_READ(in_INSERT_TYPE ); 260 260 _queue[index]._store_queue_ptr_write = PORT_READ(in_INSERT_STORE_QUEUE_PTR_WRITE); 261 if (_param->_have_port_load_queue_ptr) 261 262 _queue[index]._load_queue_ptr_write = PORT_READ(in_INSERT_LOAD_QUEUE_PTR_WRITE ); 262 263 _queue[index]._has_immediat = PORT_READ(in_INSERT_HAS_IMMEDIAT ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/SelfTest/configuration.cfg
r77 r78 13 13 2 2 *2 # nb_spr_write 14 14 4 4 *2 # size_store_queue 15 4 4 *2# size_load_queue15 1 4 *4 # size_load_queue 16 16 2 2 *2 # nb_inst_retire 17 17 2 2 *2 # nb_bypass_write -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/SelfTest/src/test.cpp
r76 r78 161 161 INSTANCE_SC_SIGNAL (_Read_unit, in_READ_UNIT_IN_TYPE ); 162 162 INSTANCE_SC_SIGNAL (_Read_unit, in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE ); 163 if (_param->_have_port_load_queue_ptr) 163 164 INSTANCE_SC_SIGNAL (_Read_unit, in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE ); 164 165 INSTANCE_SC_SIGNAL (_Read_unit, in_READ_UNIT_IN_HAS_IMMEDIAT ); … … 187 188 INSTANCE1_SC_SIGNAL(_Read_unit,out_READ_UNIT_OUT_TYPE ,_param->_nb_inst_retire); 188 189 INSTANCE1_SC_SIGNAL(_Read_unit,out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_retire); 190 if (_param->_have_port_load_queue_ptr) 189 191 INSTANCE1_SC_SIGNAL(_Read_unit,out_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_retire); 190 192 INSTANCE1_SC_SIGNAL(_Read_unit,out_READ_UNIT_OUT_HAS_IMMEDIAT ,_param->_nb_inst_retire); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/include/Parameters.h
r77 r78 57 57 public : const bool _have_port_ooo_engine_id ; 58 58 public : const bool _have_port_packet_id ; 59 public : const bool _have_port_load_queue_ptr; 59 60 60 61 public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::read_queue ::Parameters * _param_read_queue; … … 82 83 public : ~Parameters () ; 83 84 84 public : std::stringmsg_error (void);85 public : Parameters_test msg_error (void); 85 86 86 87 public : std::string print (uint32_t depth); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Parameters.cpp
r77 r78 66 66 _have_port_front_end_id (_size_front_end_id >0), 67 67 _have_port_ooo_engine_id (_size_ooo_engine_id>0), 68 _have_port_packet_id (_size_packet_id >0) 68 _have_port_packet_id (_size_packet_id >0), 69 _have_port_load_queue_ptr (_size_load_queue >1) 69 70 { 70 71 log_printf(FUNC,Read_unit,FUNCTION,"Begin"); … … 144 145 _have_port_front_end_id (param._have_port_front_end_id ), 145 146 _have_port_ooo_engine_id (param._have_port_ooo_engine_id ), 146 _have_port_packet_id (param._have_port_packet_id ) 147 _have_port_packet_id (param._have_port_packet_id ), 148 _have_port_load_queue_ptr (param._have_port_load_queue_ptr) 147 149 { 148 150 log_printf(FUNC,Read_unit,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Parameters_msg_error.cpp
r76 r78 21 21 #undef FUNCTION 22 22 #define FUNCTION "Read_unit::msg_error" 23 std::stringParameters::msg_error(void)23 Parameters_test Parameters::msg_error(void) 24 24 { 25 25 log_printf(FUNC,Read_unit,FUNCTION,"Begin"); 26 26 27 std::string msg = ""; 28 29 return msg; 27 Parameters_test test ("Read_unit"); 30 28 31 29 log_printf(FUNC,Read_unit,FUNCTION,"End"); 30 31 return test; 32 32 }; 33 33 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_allocation.cpp
r76 r78 59 59 ALLOC_INTERFACE("read_unit_in", IN, WEST, "Enter of new operation"); 60 60 61 ALLOC_VAL _IN ( in_READ_UNIT_IN_VAL);62 ALLOC_ ACK_OUT (out_READ_UNIT_IN_ACK);61 ALLOC_VALACK_IN ( in_READ_UNIT_IN_VAL,VAL); 62 ALLOC_VALACK_OUT (out_READ_UNIT_IN_ACK,ACK); 63 63 ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); 64 64 ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); … … 67 67 ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 68 68 ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 69 ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t , _param->_size_store_queue);70 ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t , _param->_size_load_queue);69 ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,log2(_param->_size_store_queue)); 70 ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,log2(_param->_size_load_queue)); 71 71 ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1); 72 72 ALLOC_SIGNAL_IN ( in_READ_UNIT_IN_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data); … … 87 87 ALLOC1_INTERFACE("read_unit_out", OUT, EAST, "Output of operation. All operand is valid.", _param->_nb_inst_retire); 88 88 89 ALLOC1_VAL _OUT (out_READ_UNIT_OUT_VAL);90 ALLOC1_ ACK_IN ( in_READ_UNIT_OUT_ACK);89 ALLOC1_VALACK_OUT (out_READ_UNIT_OUT_VAL,VAL); 90 ALLOC1_VALACK_IN ( in_READ_UNIT_OUT_ACK,ACK); 91 91 ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); 92 92 ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); … … 95 95 ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 96 96 ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 97 ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t , _param->_size_store_queue);98 ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t , _param->_size_load_queue);97 ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,log2(_param->_size_store_queue)); 98 ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,log2(_param->_size_load_queue )); 99 99 ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1 ); 100 100 ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data ); … … 112 112 ALLOC1_INTERFACE("gpr_read", OUT, SOUTH, "Read port.", _param->_nb_gpr_read); 113 113 114 ALLOC1_VAL _OUT (out_GPR_READ_VAL);115 ALLOC1_ ACK_IN ( in_GPR_READ_ACK);114 ALLOC1_VALACK_OUT (out_GPR_READ_VAL,VAL); 115 ALLOC1_VALACK_IN ( in_GPR_READ_ACK,ACK); 116 116 ALLOC1_SIGNAL_OUT(out_GPR_READ_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); 117 117 ALLOC1_SIGNAL_OUT(out_GPR_READ_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_general_data ); … … 124 124 ALLOC1_INTERFACE("spr_read", OUT, SOUTH, "Read port.", _param->_nb_spr_read); 125 125 126 ALLOC1_VAL _OUT (out_SPR_READ_VAL);127 ALLOC1_ ACK_IN ( in_SPR_READ_ACK);126 ALLOC1_VALACK_OUT (out_SPR_READ_VAL,VAL); 127 ALLOC1_VALACK_IN ( in_SPR_READ_ACK,ACK); 128 128 ALLOC1_SIGNAL_OUT(out_SPR_READ_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); 129 129 ALLOC1_SIGNAL_OUT(out_SPR_READ_NUM_REG ,"num_reg" ,Tspecial_address_t,_param->_size_special_data ); … … 136 136 ALLOC1_INTERFACE("gpr_write", IN , SOUTH, "Write port.", _param->_nb_gpr_write); 137 137 138 ALLOC1_VAL _IN ( in_GPR_WRITE_VAL);138 ALLOC1_VALACK_IN ( in_GPR_WRITE_VAL,VAL); 139 139 ALLOC1_SIGNAL_IN ( in_GPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); 140 140 ALLOC1_SIGNAL_IN ( in_GPR_WRITE_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_general_data ); … … 146 146 ALLOC1_INTERFACE("spr_write", IN , SOUTH, "Write port.", _param->_nb_spr_write); 147 147 148 ALLOC1_VAL _IN ( in_SPR_WRITE_VAL);148 ALLOC1_VALACK_IN ( in_SPR_WRITE_VAL,VAL); 149 149 ALLOC1_SIGNAL_IN ( in_SPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); 150 150 ALLOC1_SIGNAL_IN ( in_SPR_WRITE_NUM_REG ,"num_reg" ,Tspecial_address_t,_param->_size_special_data ); … … 216 216 name = _name+"_read_queue"; 217 217 std::cout << "Instance : " << name << std::endl; 218 219 218 { 220 219 #ifdef POSITION … … 248 247 _component->port_map(name, "in_READ_QUEUE_IN_TYPE" ,dest, "in_READ_UNIT_IN_TYPE" ); 249 248 _component->port_map(name, "in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE",dest, "in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE"); 249 if (_param->_have_port_load_queue_ptr) 250 250 _component->port_map(name, "in_READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE" ,dest, "in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE" ); 251 251 _component->port_map(name, "in_READ_QUEUE_IN_HAS_IMMEDIAT" ,dest, "in_READ_UNIT_IN_HAS_IMMEDIAT" ); … … 284 284 _component->port_map(name,"out_READ_QUEUE_OUT_TYPE" ,dest, "in_INSERT_TYPE" ); 285 285 _component->port_map(name,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE",dest, "in_INSERT_STORE_QUEUE_PTR_WRITE"); 286 if (_param->_have_port_load_queue_ptr) 286 287 _component->port_map(name,"out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE" ,dest, "in_INSERT_LOAD_QUEUE_PTR_WRITE" ); 287 288 _component->port_map(name,"out_READ_QUEUE_OUT_HAS_IMMEDIAT" ,dest, "in_INSERT_HAS_IMMEDIAT" ); … … 375 376 name = _name+"_reservation_station"; 376 377 std::cout << "Instance : " << name << std::endl; 377 378 378 { 379 379 #ifdef POSITION … … 408 408 _component->port_map(name, "in_INSERT_TYPE" ,dest,"out_READ_QUEUE_OUT_TYPE" ); 409 409 _component->port_map(name, "in_INSERT_STORE_QUEUE_PTR_WRITE",dest,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE"); 410 if (_param->_have_port_load_queue_ptr) 410 411 _component->port_map(name, "in_INSERT_LOAD_QUEUE_PTR_WRITE" ,dest,"out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE" ); 411 412 _component->port_map(name, "in_INSERT_HAS_IMMEDIAT" ,dest,"out_READ_QUEUE_OUT_HAS_IMMEDIAT" ); … … 452 453 _component->port_map(name,"out_RETIRE_"+toString(i)+"_TYPE" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_TYPE" ); 453 454 _component->port_map(name,"out_RETIRE_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",dest,"out_READ_UNIT_OUT_"+toString(i)+"_STORE_QUEUE_PTR_WRITE"); 455 if (_param->_have_port_load_queue_ptr) 454 456 _component->port_map(name,"out_RETIRE_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ); 455 457 _component->port_map(name,"out_RETIRE_"+toString(i)+"_HAS_IMMEDIAT" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_HAS_IMMEDIAT" ); … … 528 530 } 529 531 } 532 530 533 531 534 #ifdef POSITION -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_deallocation.cpp
r76 r78 42 42 delete in_READ_UNIT_IN_TYPE ; 43 43 delete in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE; 44 if (_param->_have_port_load_queue_ptr) 44 45 delete in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE ; 45 46 delete in_READ_UNIT_IN_HAS_IMMEDIAT ; … … 70 71 delete [] out_READ_UNIT_OUT_TYPE ; 71 72 delete [] out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE; 73 if (_param->_have_port_load_queue_ptr) 72 74 delete [] out_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ; 73 75 delete [] out_READ_UNIT_OUT_HAS_IMMEDIAT ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Parameters.h
r77 r78 55 55 public : ~Parameters () ; 56 56 57 public : std::stringmsg_error (void);57 public : Parameters_test msg_error (void); 58 58 59 59 public : std::string print (uint32_t depth); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_allocation.cpp
r75 r78 54 54 ALLOC_INTERFACE ("execute_queue_in", IN, WEST, "Input of execute_queue"); 55 55 56 ALLOC_VAL _IN ( in_EXECUTE_QUEUE_IN_VAL);57 ALLOC_ ACK_OUT (out_EXECUTE_QUEUE_IN_ACK);56 ALLOC_VALACK_IN ( in_EXECUTE_QUEUE_IN_VAL,VAL); 57 ALLOC_VALACK_OUT(out_EXECUTE_QUEUE_IN_ACK,ACK); 58 58 if(_param->_have_port_context_id) 59 59 ALLOC_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); … … 76 76 ALLOC_INTERFACE ("execute_queue_out", OUT, EAST, "Output of execute_queue"); 77 77 78 ALLOC_VAL _OUT (out_EXECUTE_QUEUE_OUT_VAL);79 ALLOC_ ACK_IN ( in_EXECUTE_QUEUE_OUT_ACK);78 ALLOC_VALACK_OUT(out_EXECUTE_QUEUE_OUT_VAL,VAL); 79 ALLOC_VALACK_IN ( in_EXECUTE_QUEUE_OUT_ACK,ACK); 80 80 if(_param->_have_port_context_id) 81 81 ALLOC_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters_msg_error.cpp
r73 r78 22 22 #undef FUNCTION 23 23 #define FUNCTION "Execute_queue::msg_error" 24 std::stringParameters::msg_error(void)24 Parameters_test Parameters::msg_error(void) 25 25 { 26 26 log_printf(FUNC,Execute_queue,FUNCTION,"Begin"); 27 27 28 std::string msg = ""; 29 30 return msg; 28 Parameters_test test ("Execute_queue"); 31 29 32 30 log_printf(FUNC,Execute_queue,FUNCTION,"End"); 31 32 return test; 33 33 }; 34 34 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h
r77 r78 66 66 public : ~Parameters () ; 67 67 68 public : std::stringmsg_error (void);68 public : Parameters_test msg_error (void); 69 69 70 70 public : std::string print (uint32_t depth); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp
r74 r78 22 22 #undef FUNCTION 23 23 #define FUNCTION "Write_queue::msg_error" 24 std::stringParameters::msg_error(void)24 Parameters_test Parameters::msg_error(void) 25 25 { 26 26 log_printf(FUNC,Write_queue,FUNCTION,"Begin"); 27 27 28 std::string msg = "";28 Parameters_test test ("Write_queue"); 29 29 30 30 if (_nb_bypass_write > _size_queue) 31 msg += " * The write_queue can't have more bypass_write than entry in the queue."; 32 33 return msg; 31 test.error("The write_queue can't have more bypass_write than entry in the queue."); 34 32 35 33 log_printf(FUNC,Write_queue,FUNCTION,"End"); 34 35 return test; 36 36 }; 37 37 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp
r77 r78 53 53 ALLOC_INTERFACE ("write_queue_in", IN, WEST, "Input of write_queue"); 54 54 55 ALLOC_VAL _IN ( in_WRITE_QUEUE_IN_VAL);56 ALLOC_ ACK_OUT (out_WRITE_QUEUE_IN_ACK);55 ALLOC_VALACK_IN ( in_WRITE_QUEUE_IN_VAL,VAL); 56 ALLOC_VALACK_OUT(out_WRITE_QUEUE_IN_ACK,ACK); 57 57 ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); 58 58 ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); … … 76 76 ALLOC_INTERFACE ("write_queue_out", OUT, EAST, "Output of write_queue"); 77 77 78 ALLOC_VAL _OUT (out_WRITE_QUEUE_OUT_VAL);79 ALLOC_ ACK_IN ( in_WRITE_QUEUE_OUT_ACK);78 ALLOC_VALACK_OUT(out_WRITE_QUEUE_OUT_VAL,VAL); 79 ALLOC_VALACK_IN ( in_WRITE_QUEUE_OUT_ACK,ACK); 80 80 ALLOC_SIGNAL_OUT(out_WRITE_QUEUE_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); 81 81 ALLOC_SIGNAL_OUT(out_WRITE_QUEUE_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); … … 94 94 ALLOC1_INTERFACE("gpr_write", OUT, SOUTH ,"Output of write_queue", _param->_nb_gpr_write); 95 95 96 ALLOC1_VAL _OUT (out_GPR_WRITE_VAL);97 ALLOC1_ ACK_IN ( in_GPR_WRITE_ACK);96 ALLOC1_VALACK_OUT(out_GPR_WRITE_VAL,VAL); 97 ALLOC1_VALACK_IN ( in_GPR_WRITE_ACK,ACK); 98 98 ALLOC1_SIGNAL_OUT(out_GPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); 99 99 ALLOC1_SIGNAL_OUT(out_GPR_WRITE_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_general_register); … … 105 105 ALLOC1_INTERFACE("spr_write", OUT, SOUTH ,"Output of write_queue", _param->_nb_spr_write); 106 106 107 ALLOC1_VAL _OUT (out_SPR_WRITE_VAL);108 ALLOC1_ ACK_IN ( in_SPR_WRITE_ACK);107 ALLOC1_VALACK_OUT(out_SPR_WRITE_VAL,VAL); 108 ALLOC1_VALACK_IN ( in_SPR_WRITE_ACK,ACK); 109 109 ALLOC1_SIGNAL_OUT(out_SPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); 110 110 ALLOC1_SIGNAL_OUT(out_SPR_WRITE_NUM_REG ,"num_reg" ,Tspecial_address_t,_param->_size_special_register); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h
r77 r78 74 74 public : ~Parameters () ; 75 75 76 public : std::stringmsg_error (void);76 public : Parameters_test msg_error (void); 77 77 78 78 public : std::string print (uint32_t depth); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters_msg_error.cpp
r74 r78 20 20 #undef FUNCTION 21 21 #define FUNCTION "Write_unit::msg_error" 22 std::stringParameters::msg_error(void)22 Parameters_test Parameters::msg_error(void) 23 23 { 24 24 log_printf(FUNC,Write_unit,FUNCTION,"Begin"); 25 25 26 std::string msg = "";26 Parameters_test test ("Write_unit"); 27 27 28 28 if (_size_write_queue == 0) 29 msg += " * Write queue must have a less one entry."; 30 31 return msg; 29 test.error("Write queue must have a less one entry."); 32 30 33 31 log_printf(FUNC,Write_unit,FUNCTION,"End"); 32 33 return test; 34 34 }; 35 35 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_allocation.cpp
r77 r78 59 59 ALLOC_INTERFACE ("write_unit_in", IN, WEST, "Input of write_unit"); 60 60 61 ALLOC_VAL _IN ( in_WRITE_UNIT_IN_VAL);62 ALLOC_ ACK_OUT (out_WRITE_UNIT_IN_ACK);61 ALLOC_VALACK_IN ( in_WRITE_UNIT_IN_VAL,VAL); 62 ALLOC_VALACK_OUT(out_WRITE_UNIT_IN_ACK,ACK); 63 63 ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); 64 64 ALLOC_SIGNAL_IN ( in_WRITE_UNIT_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); … … 82 82 ALLOC_INTERFACE ("write_unit_out", OUT, EAST, "Output of write_unit"); 83 83 84 ALLOC_VAL _OUT (out_WRITE_UNIT_OUT_VAL);85 ALLOC_ ACK_IN ( in_WRITE_UNIT_OUT_ACK);84 ALLOC_VALACK_OUT(out_WRITE_UNIT_OUT_VAL,VAL); 85 ALLOC_VALACK_IN ( in_WRITE_UNIT_OUT_ACK,ACK); 86 86 ALLOC_SIGNAL_OUT(out_WRITE_UNIT_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); 87 87 ALLOC_SIGNAL_OUT(out_WRITE_UNIT_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); … … 100 100 ALLOC1_INTERFACE("gpr_write", OUT, SOUTH ,"Output of write_unit", _param->_nb_gpr_write); 101 101 102 ALLOC1_VAL _OUT (out_GPR_WRITE_VAL);103 ALLOC1_ ACK_IN ( in_GPR_WRITE_ACK);102 ALLOC1_VALACK_OUT(out_GPR_WRITE_VAL,VAL); 103 ALLOC1_VALACK_IN ( in_GPR_WRITE_ACK,ACK); 104 104 ALLOC1_SIGNAL_OUT(out_GPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); 105 105 ALLOC1_SIGNAL_OUT(out_GPR_WRITE_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_general_register); … … 111 111 ALLOC1_INTERFACE("spr_write", OUT, SOUTH ,"Output of write_unit", _param->_nb_spr_write); 112 112 113 ALLOC1_VAL _OUT (out_SPR_WRITE_VAL);114 ALLOC1_ ACK_IN ( in_SPR_WRITE_ACK);113 ALLOC1_VALACK_OUT(out_SPR_WRITE_VAL,VAL); 114 ALLOC1_VALACK_IN ( in_SPR_WRITE_ACK,ACK); 115 115 ALLOC1_SIGNAL_OUT(out_SPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); 116 116 ALLOC1_SIGNAL_OUT(out_SPR_WRITE_NUM_REG ,"num_reg" ,Tspecial_address_t,_param->_size_special_register); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/SelfTest/src/test.cpp
r77 r78 52 52 public : Tpacket_t _packet_id ; 53 53 //public : Toperation_t _operation ; 54 //public : Ttype_t _type ;54 public : Ttype_t _type ; 55 55 public : Tcontrol_t _write_rd ; 56 56 public : Tgeneral_address_t _num_reg_rd ; … … 68 68 Tpacket_t packet_id , 69 69 // Toperation_t operation , 70 //Ttype_t type ,70 Ttype_t type , 71 71 Tcontrol_t write_rd , 72 72 Tgeneral_address_t num_reg_rd , … … 84 84 _packet_id = packet_id ; 85 85 // _operation = operation ; 86 //_type = type ;86 _type = type ; 87 87 _write_rd = write_rd ; 88 88 _num_reg_rd = num_reg_rd ; … … 128 128 ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_PACKET_ID ," in_EXECUTE_UNIT_OUT_PACKET_ID ",Tpacket_t ,_param->_nb_execute_unit); 129 129 //ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_OPERATION ," in_EXECUTE_UNIT_OUT_OPERATION ",Toperation_t ,_param->_nb_execute_unit); 130 //ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_TYPE ," in_EXECUTE_UNIT_OUT_TYPE ",Ttype_t ,_param->_nb_execute_unit);130 ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_TYPE ," in_EXECUTE_UNIT_OUT_TYPE ",Ttype_t ,_param->_nb_execute_unit); 131 131 ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_WRITE_RD ," in_EXECUTE_UNIT_OUT_WRITE_RD ",Tcontrol_t ,_param->_nb_execute_unit); 132 132 ALLOC1_SC_SIGNAL( in_EXECUTE_UNIT_OUT_NUM_REG_RD ," in_EXECUTE_UNIT_OUT_NUM_REG_RD ",Tgeneral_address_t,_param->_nb_execute_unit); … … 145 145 ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_PACKET_ID ,"out_WRITE_UNIT_IN_PACKET_ID ",Tpacket_t ,_param->_nb_write_unit ); 146 146 //ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_OPERATION ,"out_WRITE_UNIT_IN_OPERATION ",Toperation_t ,_param->_nb_write_unit ); 147 //ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_TYPE ,"out_WRITE_UNIT_IN_TYPE ",Ttype_t ,_param->_nb_write_unit );147 ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_TYPE ,"out_WRITE_UNIT_IN_TYPE ",Ttype_t ,_param->_nb_write_unit ); 148 148 ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_WRITE_RD ,"out_WRITE_UNIT_IN_WRITE_RD ",Tcontrol_t ,_param->_nb_write_unit ); 149 149 ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_NUM_REG_RD ,"out_WRITE_UNIT_IN_NUM_REG_RD ",Tgeneral_address_t,_param->_nb_write_unit ); … … 176 176 INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_PACKET_ID ,_param->_nb_execute_unit); 177 177 //INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_OPERATION ,_param->_nb_execute_unit); 178 //INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_TYPE ,_param->_nb_execute_unit);178 INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_TYPE ,_param->_nb_execute_unit); 179 179 INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_WRITE_RD ,_param->_nb_execute_unit); 180 180 INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_NUM_REG_RD ,_param->_nb_execute_unit); … … 198 198 INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_PACKET_ID ,_param->_nb_write_unit ); 199 199 //INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_OPERATION ,_param->_nb_write_unit ); 200 //INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_TYPE ,_param->_nb_write_unit );200 INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_TYPE ,_param->_nb_write_unit ); 201 201 INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_WRITE_RD ,_param->_nb_write_unit ); 202 202 INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_NUM_REG_RD ,_param->_nb_write_unit ); … … 282 282 nb_request_in, 283 283 //range<Toperation_t > (rand(), _param->_size_operation ), 284 //range<Ttype_t > (rand(), _param->_size_type ),284 range<Ttype_t > (rand(), _param->_size_type ), 285 285 range<Tcontrol_t > (rand(), 2 ), 286 286 range<Tgeneral_address_t> (rand(), _param->_size_general_register), … … 314 314 in_EXECUTE_UNIT_OUT_PACKET_ID [i] ->write(request[i].front()._packet_id ); 315 315 // in_EXECUTE_UNIT_OUT_OPERATION [i] ->write(request[i].front()._operation ); 316 //in_EXECUTE_UNIT_OUT_TYPE [i] ->write(request[i].front()._type );316 in_EXECUTE_UNIT_OUT_TYPE [i] ->write(request[i].front()._type ); 317 317 in_EXECUTE_UNIT_OUT_WRITE_RD [i] ->write(request[i].front()._write_rd ); 318 318 in_EXECUTE_UNIT_OUT_NUM_REG_RD [i] ->write(request[i].front()._num_reg_rd ); … … 368 368 TEST(Tcontext_t ,out_WRITE_UNIT_IN_OOO_ENGINE_ID [i]->read(), request[execute_unit].front()._ooo_engine_id ); 369 369 // TEST(Toperation_t ,out_WRITE_UNIT_IN_OPERATION [i]->read(), request[execute_unit].front()._operation ); 370 //TEST(Ttype_t ,out_WRITE_UNIT_IN_TYPE [i]->read(), request[execute_unit].front()._type );370 TEST(Ttype_t ,out_WRITE_UNIT_IN_TYPE [i]->read(), request[execute_unit].front()._type ); 371 371 TEST(Tcontrol_t ,out_WRITE_UNIT_IN_WRITE_RD [i]->read(), request[execute_unit].front()._write_rd ); 372 372 TEST(Tgeneral_address_t,out_WRITE_UNIT_IN_NUM_REG_RD [i]->read(), request[execute_unit].front()._num_reg_rd ); … … 405 405 delete [] in_EXECUTE_UNIT_OUT_PACKET_ID ; 406 406 //delete [] in_EXECUTE_UNIT_OUT_OPERATION ; 407 //delete [] in_EXECUTE_UNIT_OUT_TYPE ;407 delete [] in_EXECUTE_UNIT_OUT_TYPE ; 408 408 delete [] in_EXECUTE_UNIT_OUT_WRITE_RD ; 409 409 delete [] in_EXECUTE_UNIT_OUT_NUM_REG_RD ; … … 423 423 delete [] out_WRITE_UNIT_IN_PACKET_ID ; 424 424 //delete [] out_WRITE_UNIT_IN_OPERATION ; 425 //delete [] out_WRITE_UNIT_IN_TYPE ;425 delete [] out_WRITE_UNIT_IN_TYPE ; 426 426 delete [] out_WRITE_UNIT_IN_WRITE_RD ; 427 427 delete [] out_WRITE_UNIT_IN_NUM_REG_RD ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Execution_unit_to_Write_unit.h
r77 r78 17 17 #include "Common/include/ToString.h" 18 18 #include "Common/include/Debug.h" 19 #include "Behavioural/include/Identification.h" 19 20 20 #include "Behavioural/ Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Types.h"21 #include "Behavioural/include/Types.h" 21 22 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Parameters.h" 22 23 #ifdef STATISTICS … … 71 72 public : SC_IN (Tpacket_t ) ** in_EXECUTE_UNIT_OUT_PACKET_ID ; 72 73 //public : SC_IN (Toperation_t ) ** in_EXECUTE_UNIT_OUT_OPERATION ; 73 //public : SC_IN (Ttype_t ) ** in_EXECUTE_UNIT_OUT_TYPE ;74 public : SC_IN (Ttype_t ) ** in_EXECUTE_UNIT_OUT_TYPE ; 74 75 public : SC_IN (Tcontrol_t ) ** in_EXECUTE_UNIT_OUT_WRITE_RD ; 75 76 public : SC_IN (Tgeneral_address_t) ** in_EXECUTE_UNIT_OUT_NUM_REG_RD ; … … 90 91 public : SC_OUT(Tpacket_t ) ** out_WRITE_UNIT_IN_PACKET_ID ; 91 92 //public : SC_OUT(Toperation_t ) ** out_WRITE_UNIT_IN_OPERATION ; 92 //public : SC_OUT(Ttype_t ) ** out_WRITE_UNIT_IN_TYPE ;93 public : SC_OUT(Ttype_t ) ** out_WRITE_UNIT_IN_TYPE ; 93 94 public : SC_OUT(Tcontrol_t ) ** out_WRITE_UNIT_IN_WRITE_RD ; 94 95 public : SC_OUT(Tgeneral_address_t) ** out_WRITE_UNIT_IN_NUM_REG_RD ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Parameters.h
r77 r78 10 10 11 11 #include "Behavioural/include/Parameters.h" 12 #include "Behavioural/include/Types.h" 12 13 #include "Common/include/Debug.h" 13 #include "Behavioural/ Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Types.h"14 #include "Behavioural/include/Identification.h" 14 15 15 16 namespace morpheo { … … 70 71 public : ~Parameters (); 71 72 72 public : std::stringmsg_error (void);73 public : Parameters_test msg_error (void); 73 74 74 75 public : std::string print (uint32_t depth); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_allocation.cpp
r77 r78 60 60 ALLOC1_INTERFACE("execute_unit_out", IN, EAST, "Output of execution_unit", _param->_nb_execute_unit); 61 61 62 ALLOC1_VAL _IN ( in_EXECUTE_UNIT_OUT_VAL);63 ALLOC1_ ACK_OUT (out_EXECUTE_UNIT_OUT_ACK);62 ALLOC1_VALACK_IN ( in_EXECUTE_UNIT_OUT_VAL,VAL); 63 ALLOC1_VALACK_OUT(out_EXECUTE_UNIT_OUT_ACK,ACK); 64 64 ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); 65 65 ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); … … 67 67 ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_packet_id ); 68 68 //ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 69 //ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type );69 ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 70 70 ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); 71 71 ALLOC1_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register); … … 82 82 ALLOC1_INTERFACE("write_unit_in", OUT, WEST, "Input of write_unit", _param->_nb_write_unit); 83 83 84 ALLOC1_VAL _OUT(out_WRITE_UNIT_IN_VAL);85 ALLOC1_ ACK_IN ( in_WRITE_UNIT_IN_ACK);84 ALLOC1_VALACK_OUT(out_WRITE_UNIT_IN_VAL,VAL); 85 ALLOC1_VALACK_IN ( in_WRITE_UNIT_IN_ACK,ACK); 86 86 ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); 87 87 ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); … … 89 89 ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_packet_id ); 90 90 //ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 91 //ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type );91 ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 92 92 ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); 93 93 ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_deallocation.cpp
r77 r78 39 39 delete [] in_EXECUTE_UNIT_OUT_PACKET_ID ; 40 40 //delete [] in_EXECUTE_UNIT_OUT_OPERATION ; 41 //delete [] in_EXECUTE_UNIT_OUT_TYPE ;41 delete [] in_EXECUTE_UNIT_OUT_TYPE ; 42 42 delete [] in_EXECUTE_UNIT_OUT_WRITE_RD ; 43 43 delete [] in_EXECUTE_UNIT_OUT_NUM_REG_RD ; … … 61 61 delete [] out_WRITE_UNIT_IN_PACKET_ID ; 62 62 //delete [] out_WRITE_UNIT_IN_OPERATION ; 63 //delete [] out_WRITE_UNIT_IN_TYPE ;63 delete [] out_WRITE_UNIT_IN_TYPE ; 64 64 delete [] out_WRITE_UNIT_IN_WRITE_RD ; 65 65 delete [] out_WRITE_UNIT_IN_NUM_REG_RD ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_genMealy.cpp
r77 r78 75 75 PORT_WRITE(out_WRITE_UNIT_IN_PACKET_ID [dest], PORT_READ(in_EXECUTE_UNIT_OUT_PACKET_ID [i])); 76 76 //PORT_WRITE(out_WRITE_UNIT_IN_OPERATION [dest], PORT_READ(in_EXECUTE_UNIT_OUT_OPERATION [i])); 77 //PORT_WRITE(out_WRITE_UNIT_IN_TYPE [dest], PORT_READ(in_EXECUTE_UNIT_OUT_TYPE [i]));77 PORT_WRITE(out_WRITE_UNIT_IN_TYPE [dest], PORT_READ(in_EXECUTE_UNIT_OUT_TYPE [i])); 78 78 PORT_WRITE(out_WRITE_UNIT_IN_WRITE_RD [dest], PORT_READ(in_EXECUTE_UNIT_OUT_WRITE_RD [i])); 79 79 PORT_WRITE(out_WRITE_UNIT_IN_NUM_REG_RD [dest], PORT_READ(in_EXECUTE_UNIT_OUT_NUM_REG_RD [i])); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Parameters_msg_error.cpp
r77 r78 21 21 #undef FUNCTION 22 22 #define FUNCTION "Execution_unit_to_Write_unit::msg_error" 23 std::stringParameters::msg_error(void)23 Parameters_test Parameters::msg_error(void) 24 24 { 25 25 log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,"Begin"); 26 26 27 std::string msg = "";27 Parameters_test test("Execution_unit_to_Write_unit"); 28 28 29 29 for (uint32_t i=0; i<_nb_execute_unit; i++) … … 35 35 36 36 if (j == _nb_write_unit) 37 msg += " - The execute_unit ["+toString(i)+"] is link with none write_unit.\n";37 test.error("The execute_unit ["+toString(i)+"] is link with none write_unit."); 38 38 } 39 39 … … 46 46 47 47 if (j == _nb_thread) 48 msg += " - The write_unit ["+toString(i)+"] have none source's thread.\n";48 test.error("The write_unit ["+toString(i)+"] have none source's thread."); 49 49 } 50 50 51 return msg; 51 if ( (_priority != PRIORITY_STATIC ) and 52 (_priority != PRIORITY_ROUND_ROBIN)) 53 test.error("Unsupported priority scheme. It must be Static or Round Robin."); 52 54 53 55 log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,"End"); 56 57 return test; 54 58 }; 55 59 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/SelfTest/config_multi_execute-mono_thread.cfg
r77 r78 11 11 16 16 *2 # nb_special_register 12 12 4 4 *2 # size_store_queue 13 4 4 *2# size_load_queue13 1 4 *4 # size_load_queue 14 14 0 1 +1 # priority 15 15 1 1 +1 # table_routing [0][0] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/SelfTest/src/test.cpp
r77 r78 190 190 INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit, in_READ_UNIT_OUT_TYPE ,_param->_nb_read_unit); 191 191 INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit, in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,_param->_nb_read_unit); 192 if (_param->_have_port_load_queue_ptr) 192 193 INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit, in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_read_unit); 193 194 INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit, in_READ_UNIT_OUT_HAS_IMMEDIAT ,_param->_nb_read_unit); … … 214 215 INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit,out_EXECUTE_UNIT_IN_TYPE ,_param->_nb_execute_unit); 215 216 INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit,out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE,_param->_nb_execute_unit); 217 if (_param->_have_port_load_queue_ptr) 216 218 INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit,out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE ,_param->_nb_execute_unit); 217 219 INSTANCE1_SC_SIGNAL(_Read_unit_to_Execution_unit,out_EXECUTE_UNIT_IN_HAS_IMMEDIAT ,_param->_nb_execute_unit); … … 352 354 in_READ_UNIT_OUT_TYPE [i] ->write(request[i].front()._type ); 353 355 in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE[i] ->write(request[i].front()._store_queue_ptr_write); 356 if (_param->_have_port_load_queue_ptr) 354 357 in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE [i] ->write(request[i].front()._load_queue_ptr_write ); 355 358 in_READ_UNIT_OUT_HAS_IMMEDIAT [i] ->write(request[i].front()._has_immediat ); … … 408 411 TEST(Ttype_t ,out_EXECUTE_UNIT_IN_TYPE [i]->read(), request[read_unit].front()._type ); 409 412 TEST(Tlsq_ptr_t ,out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE[i]->read(), request[read_unit].front()._store_queue_ptr_write); 413 if (_param->_have_port_load_queue_ptr) 410 414 TEST(Tlsq_ptr_t ,out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE [i]->read(), request[read_unit].front()._load_queue_ptr_write ); 411 415 TEST(Tcontrol_t ,out_EXECUTE_UNIT_IN_HAS_IMMEDIAT [i]->read(), request[read_unit].front()._has_immediat ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Parameters.h
r77 r78 11 11 #include "Common/include/Debug.h" 12 12 #include "Behavioural/include/Parameters.h" 13 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Types.h" 13 #include "Behavioural/include/Types.h" 14 #include "Behavioural/include/Identification.h" 14 15 15 16 namespace morpheo { … … 38 39 public : const uint32_t _size_load_queue ; 39 40 public : const Tpriority_t _priority ; 40 public : bool ** _table_routing ; // array[nb_read_unit][nb_execute_unit]41 public : bool ** _table_execute_type ; // array[nb_execute_unit][nb_type]42 public : bool ** _table_execute_thread ; // array[nb_execute_unit][nb_thread]41 public : bool ** _table_routing ; //[nb_read_unit][nb_execute_unit] 42 public : bool ** _table_execute_type ; //[nb_execute_unit][nb_type] 43 public : bool ** _table_execute_thread ; //[nb_execute_unit][nb_thread] 43 44 44 45 public : const uint32_t _size_context_id ; … … 53 54 public : const bool _have_port_ooo_engine_id; 54 55 public : const bool _have_port_packet_id ; 56 public : const bool _have_port_load_queue_ptr; 55 57 56 58 public : const uint32_t _nb_thread ; … … 78 80 public : ~Parameters () ; 79 81 80 public : std::stringmsg_error (void);82 public : Parameters_test msg_error (void); 81 83 82 84 public : std::string print (uint32_t depth); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Read_unit_to_Execution_unit.h
r77 r78 17 17 #include "Common/include/ToString.h" 18 18 #include "Common/include/Debug.h" 19 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Types.h" 19 #include "Behavioural/include/Types.h" 20 #include "Behavioural/include/Identification.h" 20 21 21 22 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Parameters.h" -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters.cpp
r77 r78 60 60 _have_port_ooo_engine_id (_size_ooo_engine_id > 0), 61 61 _have_port_packet_id (_size_packet_id > 0), 62 _have_port_load_queue_ptr(_size_load_queue > 1), 62 63 63 64 _nb_thread (get_nb_thread (nb_context, nb_front_end, nb_ooo_engine)) … … 68 69 _table_execute_type = table_execute_type ; 69 70 _table_execute_thread = table_execute_thread; 70 71 _nb_load_store_unit = 0;71 72 _nb_load_store_unit = 0; 72 73 73 74 for (uint32_t i=0; i<nb_execute_unit; i++) 74 if (table_execute_type[i][TYPE_MEMORY] == true) 75 _nb_load_store_unit ++; 76 75 { 76 if (table_execute_type[i][TYPE_MEMORY] == true) 77 _nb_load_store_unit ++; 78 } 77 79 // a execution_unit can't be a load_store unit and a functionnal unit 78 80 _nb_functionnal_unit = nb_execute_unit-_nb_load_store_unit; … … 111 113 _have_port_ooo_engine_id (param._have_port_ooo_engine_id), 112 114 _have_port_packet_id (param._have_port_packet_id ), 115 _have_port_load_queue_ptr(param._have_port_load_queue_ptr), 113 116 114 117 _nb_thread (param._nb_thread ) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Parameters_msg_error.cpp
r77 r78 21 21 #undef FUNCTION 22 22 #define FUNCTION "Read_unit_to_Execution_unit::msg_error" 23 std::stringParameters::msg_error(void)23 Parameters_test Parameters::msg_error(void) 24 24 { 25 25 log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,"Begin"); 26 26 27 std::string msg = "";27 Parameters_test test ("Read_unit_to_Execution_unit"); 28 28 29 29 // TYPE | multiple? | Optionnal? | Exclusive? | Comment … … 90 90 // Test uniq type 91 91 if (type_present [j][k] and type_uniq[k]) 92 msg += " - The execute_unit '"+toString(i)+"' can execute operation of type '"+toString_type(k)+"' at the thread '"+toString(j)+"'. But an another execute_unit can be execute the same type for the same thread. And the type must be uniq !.\n";92 test.error("The execute_unit '"+toString(i)+"' can execute operation of type '"+toString_type(k)+"' at the thread '"+toString(j)+"'. But an another execute_unit can be execute the same type for the same thread. And the type must be uniq !."); 93 93 94 94 type_present [j][k] = true; … … 99 99 for (uint32_t i=0; i<_nb_thread; i++) 100 100 if (not type_present [i][j]) 101 msg += " - The thread '"+toString(i)+"' can't access at the execute_unit to execute the type's operation '"+toString_type(j)+"' (and this type is not optionnal !).\n";101 test.error("The thread '"+toString(i)+"' can't access at the execute_unit to execute the type's operation '"+toString_type(j)+"' (and this type is not optionnal !)."); 102 102 103 103 // Test all excluve type … … 108 108 if ((j != k) and (_table_execute_type[i][k] == true)) 109 109 { 110 msg += " - The execute_unit ["+toString(i)+"] implement the type '"+toString_type(j)+"', and this type is exclusive with all others type.\n";110 test.error("The execute_unit ["+toString(i)+"] implement the type '"+toString_type(j)+"', and this type is exclusive with all others type."); 111 111 break; 112 112 } … … 120 120 121 121 if (j == _nb_thread) 122 msg += " - The execute_unit ["+toString(i)+"] have none source's thread.\n";122 test.error("The execute_unit ["+toString(i)+"] have none source's thread."); 123 123 } 124 125 return msg;126 124 125 if ( (_priority != PRIORITY_STATIC ) and 126 (_priority != PRIORITY_ROUND_ROBIN)) 127 test.error("Unsupported priority scheme. It must be Static or Round Robin."); 128 127 129 log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,"End"); 130 131 return test; 128 132 }; 129 133 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit.cpp
r77 r78 89 89 << (*(in_READ_UNIT_OUT_OPERATION [i])) 90 90 << (*(in_READ_UNIT_OUT_TYPE [i])) 91 << (*(in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE [i]))92 << (*(in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE [i]))93 91 << (*(in_READ_UNIT_OUT_HAS_IMMEDIAT [i])) 94 92 << (*(in_READ_UNIT_OUT_IMMEDIAT [i])) … … 99 97 << (*(in_READ_UNIT_OUT_NUM_REG_RD [i])) 100 98 << (*(in_READ_UNIT_OUT_WRITE_RE [i])) 101 << (*(in_READ_UNIT_OUT_NUM_REG_RE [i])); 102 99 << (*(in_READ_UNIT_OUT_NUM_REG_RE [i])) 100 << (*(in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE [i])); 101 102 if (_param->_have_port_load_queue_ptr) 103 sensitive << (*(in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE [i])); 103 104 if (_param->_have_port_context_id) 104 105 sensitive << (*(in_READ_UNIT_OUT_CONTEXT_ID [i])); … … 260 261 } 261 262 263 if (_param->_have_port_load_queue_ptr) 264 { 262 265 (*(out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE [i])) (*(in_EXECUTE_UNIT_IN_ACK [i])); 263 266 … … 274 277 (*(out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE [i])) (*(in_READ_UNIT_OUT_OOO_ENGINE_ID [j])); 275 278 } 276 279 } 280 277 281 (*(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT [i])) (*(in_EXECUTE_UNIT_IN_ACK [i])); 278 282 … … 364 368 (*(out_EXECUTE_UNIT_IN_WRITE_RD [i])) (*(in_READ_UNIT_OUT_OOO_ENGINE_ID [j])); 365 369 } 366 370 367 371 (*(out_EXECUTE_UNIT_IN_NUM_REG_RD [i])) (*(in_EXECUTE_UNIT_IN_ACK [i])); 368 372 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_allocation.cpp
r77 r78 59 59 ALLOC1_INTERFACE("read_unit_out", IN, EAST, "Output of read_unit", _param->_nb_read_unit); 60 60 61 ALLOC1_VAL _IN ( in_READ_UNIT_OUT_VAL);62 ALLOC1_ ACK_OUT(out_READ_UNIT_OUT_ACK);61 ALLOC1_VALACK_IN ( in_READ_UNIT_OUT_VAL,VAL); 62 ALLOC1_VALACK_OUT(out_READ_UNIT_OUT_ACK,ACK); 63 63 64 64 ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id); … … 68 68 ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation); 69 69 ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type); 70 ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t , _param->_size_store_queue);71 ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t , _param->_size_load_queue);70 ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,log2(_param->_size_store_queue)); 71 ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t ,log2(_param->_size_load_queue)); 72 72 ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_HAS_IMMEDIAT ,"HAS_IMMEDIAT" ,Tcontrol_t ,1); 73 73 ALLOC1_SIGNAL_IN ( in_READ_UNIT_OUT_IMMEDIAT ,"IMMEDIAT" ,Tgeneral_data_t ,_param->_size_general_data); … … 82 82 // ~~~~~[ Interface "execute_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 83 83 { 84 ALLOC1_INTERFACE("execute_unit_ out", IN, EAST, "Output of execute_unit", _param->_nb_execute_unit);85 86 ALLOC1_VAL _OUT(out_EXECUTE_UNIT_IN_VAL);87 ALLOC1_ ACK_IN ( in_EXECUTE_UNIT_IN_ACK);84 ALLOC1_INTERFACE("execute_unit_in", OUT, WEST, "Input of execute_unit", _param->_nb_execute_unit); 85 86 ALLOC1_VALACK_OUT(out_EXECUTE_UNIT_IN_VAL,VAL); 87 ALLOC1_VALACK_IN ( in_EXECUTE_UNIT_IN_ACK,ACK); 88 88 89 89 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id); … … 93 93 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation); 94 94 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type); 95 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_size_store_queue);96 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t ,_param->_size_load_queue);97 95 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT ,"HAS_IMMEDIAT" ,Tcontrol_t ,1); 96 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_DATA_RC ,"DATA_RC" ,Tspecial_data_t ,_param->_size_special_data); 97 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_WRITE_RD ,"WRITE_RD" ,Tcontrol_t ,1); 98 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_WRITE_RE ,"WRITE_RE" ,Tcontrol_t ,1); 99 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_NUM_REG_RE ,"NUM_REG_RE" ,Tspecial_address_t,_param->_size_special_register); 100 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,log2(_param->_size_store_queue)); 101 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t ,log2(_param->_size_load_queue)); 98 102 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_IMMEDIAT ,"IMMEDIAT" ,Tgeneral_data_t ,_param->_size_general_data); 99 103 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_DATA_RA ,"DATA_RA" ,Tgeneral_data_t ,_param->_size_general_data); 100 104 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_DATA_RB ,"DATA_RB" ,Tgeneral_data_t ,_param->_size_general_data); 101 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_DATA_RC ,"DATA_RC" ,Tspecial_data_t ,_param->_size_special_data);102 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_WRITE_RD ,"WRITE_RD" ,Tcontrol_t ,1);103 105 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_NUM_REG_RD ,"NUM_REG_RD" ,Tgeneral_address_t,_param->_size_general_register); 104 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_WRITE_RE ,"WRITE_RE" ,Tcontrol_t ,1);105 ALLOC1_SIGNAL_OUT(out_EXECUTE_UNIT_IN_NUM_REG_RE ,"NUM_REG_RE" ,Tspecial_address_t,_param->_size_special_register);106 106 } 107 107 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_deallocation.cpp
r77 r78 42 42 delete [] in_READ_UNIT_OUT_TYPE ; 43 43 delete [] in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE; 44 if (_param->_have_port_load_queue_ptr) 44 45 delete [] in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ; 45 46 delete [] in_READ_UNIT_OUT_HAS_IMMEDIAT ; … … 66 67 delete [] out_EXECUTE_UNIT_IN_OPERATION ; 67 68 delete [] out_EXECUTE_UNIT_IN_TYPE ; 69 delete [] out_EXECUTE_UNIT_IN_HAS_IMMEDIAT ; 70 delete [] out_EXECUTE_UNIT_IN_DATA_RC ; 71 delete [] out_EXECUTE_UNIT_IN_WRITE_RD ; 72 delete [] out_EXECUTE_UNIT_IN_WRITE_RE ; 73 delete [] out_EXECUTE_UNIT_IN_NUM_REG_RE ; 68 74 delete [] out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE; 75 if (_param->_have_port_load_queue_ptr) 69 76 delete [] out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE ; 70 delete [] out_EXECUTE_UNIT_IN_HAS_IMMEDIAT ;71 77 delete [] out_EXECUTE_UNIT_IN_IMMEDIAT ; 72 78 delete [] out_EXECUTE_UNIT_IN_DATA_RA ; 73 79 delete [] out_EXECUTE_UNIT_IN_DATA_RB ; 74 delete [] out_EXECUTE_UNIT_IN_DATA_RC ;75 delete [] out_EXECUTE_UNIT_IN_WRITE_RD ;76 80 delete [] out_EXECUTE_UNIT_IN_NUM_REG_RD ; 77 delete [] out_EXECUTE_UNIT_IN_WRITE_RE ;78 delete [] out_EXECUTE_UNIT_IN_NUM_REG_RE ;79 81 } 80 82 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_genMealy.cpp
r77 r78 78 78 PORT_WRITE(out_EXECUTE_UNIT_IN_OPERATION [dest], PORT_READ(in_READ_UNIT_OUT_OPERATION [i])); 79 79 PORT_WRITE(out_EXECUTE_UNIT_IN_TYPE [dest], PORT_READ(in_READ_UNIT_OUT_TYPE [i])); 80 PORT_WRITE(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT [dest], PORT_READ(in_READ_UNIT_OUT_HAS_IMMEDIAT [i])); 81 PORT_WRITE(out_EXECUTE_UNIT_IN_DATA_RC [dest], PORT_READ(in_READ_UNIT_OUT_DATA_RC [i])); 82 PORT_WRITE(out_EXECUTE_UNIT_IN_WRITE_RD [dest], PORT_READ(in_READ_UNIT_OUT_WRITE_RD [i])); 83 PORT_WRITE(out_EXECUTE_UNIT_IN_WRITE_RE [dest], PORT_READ(in_READ_UNIT_OUT_WRITE_RE [i])); 84 PORT_WRITE(out_EXECUTE_UNIT_IN_NUM_REG_RE [dest], PORT_READ(in_READ_UNIT_OUT_NUM_REG_RE [i])); 80 85 PORT_WRITE(out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE [dest], PORT_READ(in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE [i])); 86 if (_param->_have_port_load_queue_ptr) 81 87 PORT_WRITE(out_EXECUTE_UNIT_IN_LOAD_QUEUE_PTR_WRITE [dest], PORT_READ(in_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE [i])); 82 PORT_WRITE(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT [dest], PORT_READ(in_READ_UNIT_OUT_HAS_IMMEDIAT [i]));83 88 PORT_WRITE(out_EXECUTE_UNIT_IN_IMMEDIAT [dest], PORT_READ(in_READ_UNIT_OUT_IMMEDIAT [i])); 84 89 PORT_WRITE(out_EXECUTE_UNIT_IN_DATA_RA [dest], PORT_READ(in_READ_UNIT_OUT_DATA_RA [i])); 85 90 PORT_WRITE(out_EXECUTE_UNIT_IN_DATA_RB [dest], PORT_READ(in_READ_UNIT_OUT_DATA_RB [i])); 86 PORT_WRITE(out_EXECUTE_UNIT_IN_DATA_RC [dest], PORT_READ(in_READ_UNIT_OUT_DATA_RC [i]));87 PORT_WRITE(out_EXECUTE_UNIT_IN_WRITE_RD [dest], PORT_READ(in_READ_UNIT_OUT_WRITE_RD [i]));88 91 PORT_WRITE(out_EXECUTE_UNIT_IN_NUM_REG_RD [dest], PORT_READ(in_READ_UNIT_OUT_NUM_REG_RD [i])); 89 PORT_WRITE(out_EXECUTE_UNIT_IN_WRITE_RE [dest], PORT_READ(in_READ_UNIT_OUT_WRITE_RE [i]));90 PORT_WRITE(out_EXECUTE_UNIT_IN_NUM_REG_RE [dest], PORT_READ(in_READ_UNIT_OUT_NUM_REG_RE [i]));91 92 } 92 93 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/include/Parameters.h
r75 r78 50 50 public : ~Parameters () ; 51 51 52 public : std::stringmsg_error (void);52 public : Parameters_test msg_error (void); 53 53 54 54 public : std::string print (uint32_t depth); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Parameters_msg_error.cpp
r75 r78 21 21 #undef FUNCTION 22 22 #define FUNCTION "Register_unit_Glue::msg_error" 23 std::stringParameters::msg_error(void)23 Parameters_test Parameters::msg_error(void) 24 24 { 25 25 log_printf(FUNC,Register_unit_Glue,FUNCTION,"Begin"); 26 26 27 std::string msg = ""; 28 29 return msg; 27 Parameters_test test("Register_unit_Glue"); 30 28 31 29 log_printf(FUNC,Register_unit_Glue,FUNCTION,"End"); 30 31 return test; 32 32 }; 33 33 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Parameters.h
r75 r78 79 79 public : ~Parameters () ; 80 80 81 public : std::stringmsg_error (void);81 public : Parameters_test msg_error (void); 82 82 public : std::string print (uint32_t depth); 83 83 public : friend std::ostream& operator<< (std::ostream& output_stream, -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Register_unit.h
r75 r78 5 5 * $Id$ 6 6 * 7 * [ 7 * [ Description ] 8 8 * 9 9 */ … … 45 45 #endif 46 46 { 47 // -----[ 47 // -----[ fields ]---------------------------------------------------- 48 48 // Parameters 49 49 protected : const std::string _name; … … 59 59 60 60 #ifdef SYSTEMC 61 // ~~~~~[ 61 // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 62 62 // Interface 63 63 public : SC_CLOCK * in_CLOCK ; 64 64 public : SC_IN (Tcontrol_t) * in_NRESET ; 65 65 66 // ~~~~~[ 66 // ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 67 67 public : SC_IN (Tcontrol_t ) ** in_GPR_READ_VAL ; 68 68 public : SC_OUT(Tcontrol_t ) ** out_GPR_READ_ACK ; … … 72 72 public : SC_OUT(Tcontrol_t ) ** out_GPR_READ_DATA_VAL ; 73 73 74 // ~~~~~[ 74 // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 75 75 public : SC_IN (Tcontrol_t ) ** in_GPR_WRITE_VAL ; 76 76 public : SC_OUT(Tcontrol_t ) ** out_GPR_WRITE_ACK ; … … 79 79 public : SC_IN (Tgeneral_data_t ) ** in_GPR_WRITE_DATA ; 80 80 81 // ~~~~~[ 81 // ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 82 82 public : SC_IN (Tcontrol_t ) ** in_SPR_READ_VAL ; 83 83 public : SC_OUT(Tcontrol_t ) ** out_SPR_READ_ACK ; … … 87 87 public : SC_OUT(Tcontrol_t ) ** out_SPR_READ_DATA_VAL ; 88 88 89 // ~~~~~[ 89 // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 90 90 public : SC_IN (Tcontrol_t ) ** in_SPR_WRITE_VAL ; 91 91 public : SC_OUT(Tcontrol_t ) ** out_SPR_WRITE_ACK ; … … 94 94 public : SC_IN (Tspecial_data_t ) ** in_SPR_WRITE_DATA ; 95 95 96 // ~~~~~[ 96 // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 97 97 public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_VAL ; 98 98 public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_ACK ; … … 102 102 public : SC_IN (Tspecial_address_t) *** in_INSERT_ROB_RE_NUM_REG ; 103 103 104 // ~~~~~[ 104 // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 105 105 public : SC_IN (Tcontrol_t ) *** in_RETIRE_ROB_VAL ; 106 106 public : SC_OUT(Tcontrol_t ) *** out_RETIRE_ROB_ACK ; … … 114 114 public : SC_IN (Tspecial_address_t) *** in_RETIRE_ROB_RE_NEW_NUM_REG ; 115 115 116 // ~~~~~[ 116 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 117 117 protected : morpheo::behavioural::generic::registerfile::RegisterFile::RegisterFile ** component_gpr ; 118 118 protected : morpheo::behavioural::generic::registerfile::RegisterFile::RegisterFile ** component_gpr_status; … … 121 121 protected : morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::register_unit_glue::Register_unit_Glue::Register_unit_Glue * component_glue ; 122 122 123 // ~~~~~[ 123 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 124 124 125 // ~~~~~[ 125 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 126 126 #endif 127 127 128 // -----[ 128 // -----[ methods ]--------------------------------------------------- 129 129 130 130 #ifdef SYSTEMC -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Parameters_msg_error.cpp
r75 r78 18 18 #undef FUNCTION 19 19 #define FUNCTION "Register_unit::msg_error" 20 std::stringParameters::msg_error(void)20 Parameters_test Parameters::msg_error(void) 21 21 { 22 22 log_printf(FUNC,Register_unit,FUNCTION,"Begin"); 23 23 24 std::string msg = ""; 25 26 return msg; 24 Parameters_test test("Register_unit"); 27 25 28 26 log_printf(FUNC,Register_unit,FUNCTION,"End"); 27 28 return test; 29 29 }; 30 30 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit_allocation.cpp
r75 r78 240 240 241 241 in_RETIRE_ROB_VAL [i][j] = interface->set_signal_valack_in (VAL); 242 242 out_RETIRE_ROB_ACK [i][j] = interface->set_signal_valack_out (ACK); 243 243 in_RETIRE_ROB_RD_OLD_USE [i][j] = interface->set_signal_in <Tcontrol_t > ("rd_old_use" , 1); 244 244 in_RETIRE_ROB_RD_OLD_NUM_REG [i][j] = interface->set_signal_in <Tgeneral_address_t> ("rd_old_num_reg", _param->_size_gpr_address); … … 470 470 _name+"_glue", 471 471 "out_CONST_1"); 472 473 _component->port_map(_name+"_glue", 474 "out_CONST_1", 475 name_component, 476 "in_WRITE_"+toString(x)+"_DATA" ); 477 478 472 479 _component->port_map(name_component, 473 480 "in_WRITE_"+toString(x++)+"_ADDRESS", … … 492 499 "out_CONST_0" 493 500 ); 501 _component->port_map( _name+"_glue", 502 "out_CONST_0", 503 name_component, 504 "in_WRITE_"+toString(x)+"_DATA"); 494 505 495 506 _component->port_map(name_component, … … 515 526 _name+"_glue", 516 527 "out_CONST_0"); 528 _component->port_map(_name+"_glue", 529 "out_CONST_0", 530 name_component, 531 "in_WRITE_"+toString(x)+"_DATA" ); 517 532 518 533 _component->port_map(name_component, … … 534 549 _name+"_glue", 535 550 "out_CONST_1" 551 ); 552 _component->port_map(_name+"_glue", 553 "out_CONST_1", 554 name_component, 555 "in_WRITE_"+toString(x)+"_DATA" 536 556 ); 537 557 … … 651 671 _name+"_glue", 652 672 "out_CONST_1"); 673 _component->port_map(_name+"_glue", 674 "out_CONST_1", 675 name_component, 676 "in_WRITE_"+toString(x)+"_DATA" 677 ); 678 653 679 _component->port_map(name_component, 654 680 "in_WRITE_"+toString(x++)+"_ADDRESS", … … 673 699 "out_CONST_0" 674 700 ); 701 _component->port_map( _name+"_glue", 702 "out_CONST_0", 703 name_component, 704 "in_WRITE_"+toString(x)+"_DATA" 705 ); 675 706 676 707 _component->port_map(name_component, … … 696 727 _name+"_glue", 697 728 "out_CONST_0"); 729 _component->port_map(_name+"_glue", 730 "out_CONST_0", 731 name_component, 732 "in_WRITE_"+toString(x)+"_DATA" 733 ); 698 734 699 735 _component->port_map(name_component, … … 715 751 _name+"_glue", 716 752 "out_CONST_1" 753 ); 754 _component->port_map(_name+"_glue", 755 "out_CONST_1", 756 name_component, 757 "in_WRITE_"+toString(x)+"_DATA" 717 758 ); 718 759 … … 738 779 _component->port_map(name_component,"in_CLOCK" , _name, "in_CLOCK" ); 739 780 _component->port_map(name_component,"in_NRESET", _name, "in_NRESET"); 740 _component->port_map(name_component,"out_CONST_0");741 _component->port_map(name_component,"out_CONST_1");781 // _component->port_map(name_component,"out_CONST_0",_name,"out_CONST_0"); 782 // _component->port_map(name_component,"out_CONST_1",_name,"out_CONST_1"); 742 783 743 784 for (uint32_t j=0; j<_param->_nb_gpr_read; j++) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/Makefile.deps
r72 r78 13 13 include $(DIR_MORPHEO)/Behavioural/Makefile.deps 14 14 endif 15 ifndef Operation 16 include $(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/Makefile.deps 17 endif 18 ifndef Instruction 19 include $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/Makefile.deps 20 endif 21 22 #-----[ Directory ]---------------------------------------- 23 24 Custom_DIR = $(DIR_MORPHEO)/Behavioural/./Custom 15 25 16 26 #-----[ Library ]------------------------------------------ 17 Custom_LIBRARY = -lCustom \ 27 28 Custom_LIBRARY = -lCustom \ 29 $(Operation_LIBRARY) \ 30 $(Instruction_LIBRARY) \ 18 31 $(Behavioural_LIBRARY) 19 32 20 Custom_DIR_LIBRARY = -L$(DIR_MORPHEO)/Behavioural/./Custom/lib \ 33 Custom_DIR_LIBRARY = -L$(Custom_DIR)/lib \ 34 $(Operation_DIR_LIBRARY) \ 35 $(Instruction_DIR_LIBRARY) \ 21 36 $(Behavioural_DIR_LIBRARY) 22 23 Custom_DEPENDENCIES = Behavioural_library24 25 Custom_CLEAN = Behavioural_library_clean26 37 27 38 #-----[ Rules ]-------------------------------------------- 28 39 29 #.NOTPARALLEL : Custom_library Custom_library_clean 40 Custom_library : 41 @\ 42 $(MAKE) Behavioural_library; \ 43 $(MAKE) Instruction_library; \ 44 $(MAKE) Operation_library; \ 45 $(MAKE) --directory=$(Custom_DIR) --makefile=Makefile; 30 46 31 Custom_library : $(Custom_DEPENDENCIES) 47 48 Custom_library_clean : 32 49 @\ 33 $(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/./Custom --makefile=Makefile; 34 35 Custom_library_clean : $(Custom_CLEAN) 36 @\ 37 $(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/./Custom --makefile=Makefile clean; 50 $(MAKE) Behavioural_library_clean; \ 51 $(MAKE) Instruction_library_clean; \ 52 $(MAKE) Operation_library_clean; \ 53 $(MAKE) --directory=$(Custom_DIR) --makefile=Makefile clean; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/include/Custom.h
r72 r78 15 15 #include "Behavioural/include/Usage.h" 16 16 #include "Behavioural/include/Constants.h" 17 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h" 18 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Operation.h" 17 #include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Types.h" 18 #include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/include/Instruction.h" 19 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h" 20 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h" 19 21 20 22 namespace morpheo { … … 23 25 24 26 // TODO get_custom_vhdl 25 // TODO : complete the custom_decod_t type 26 typedef uint32_t custom_decod_t; 27 typedef uint32_t custom_vhdl_t; 28 29 typedef morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::function_decod_t custom_decod_t; 27 30 28 31 typedef morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::function_execute_t custom_execute_genMoore_t; … … 34 37 typedef struct 35 38 { 36 bool (*_get_valid_group )(uint32_t);37 uint32_t (*_get_nb_register )(uint32_t);38 access_mode_t (*_get_access_mode )(uint32_t, uint32_t);39 custom_decod_t * (*_get_custom_decod ) (uint32_t);40 custom_execute_genMoore_t * (*_get_custom_execute_genMoore ) (uint32_t);39 bool (*_get_valid_group ) (uint32_t); 40 uint32_t (*_get_nb_register ) (uint32_t); 41 access_mode_t (*_get_access_mode ) (uint32_t, uint32_t); 42 custom_decod_t * (*_get_custom_decod ) (Toperation_t); 43 custom_execute_genMoore_t * (*_get_custom_execute_genMoore ) (Toperation_t); 41 44 custom_execute_transition_t * (*_get_custom_execute_transition) (uint32_t); 42 custom_execute_transition_t * (*_get_custom_execute_reset) (uint32_t); 45 custom_execute_transition_t * (*_get_custom_execute_reset ) (uint32_t); 46 custom_vhdl_t * (*_get_vhdl_decod ) (void); 47 custom_vhdl_t * (*_get_vhdl_execute ) (void); 43 48 } custom_information_t; 44 49 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/include/Custom_default.h
r72 r78 23 23 custom_execute_transition_t * default_get_custom_execute_transition (uint32_t group); 24 24 custom_execute_transition_t * default_get_custom_execute_reset (uint32_t group); 25 custom_vhdl_t * default_get_vhdl_decod (void); 26 custom_vhdl_t * default_get_vhdl_execute (void); 27 25 28 custom_information_t default_get_custom_information (uint32_t context); 26 29 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/include/Custom_example.h
r72 r78 23 23 custom_execute_transition_t * example_get_custom_execute_transition (uint32_t group); 24 24 custom_execute_transition_t * example_get_custom_execute_reset (uint32_t group); 25 custom_vhdl_t * example_get_vhdl_decod (void); 26 custom_vhdl_t * example_get_vhdl_execute (void); 27 25 28 custom_information_t example_get_custom_information (uint32_t context); 26 29 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/src/Custom_default.cpp
r72 r78 120 120 } 121 121 122 return NULL; // unimplemented function122 return &(morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::instruction_illegal); // unimplemented function 123 123 } 124 124 … … 208 208 209 209 #undef FUNCTION 210 #define FUNCTION "custom::default_get_vhdl_decod" 211 custom_vhdl_t * default_get_vhdl_decod (void) 212 { 213 return NULL; // unimplemented function 214 } 215 216 #undef FUNCTION 217 #define FUNCTION "custom::default_get_vhdl_execute" 218 custom_vhdl_t * default_get_vhdl_execute (void) 219 { 220 return NULL; // unimplemented function 221 } 222 223 #undef FUNCTION 210 224 #define FUNCTION "custom::default_get_custom_information" 211 225 custom_information_t default_get_custom_information (uint32_t context) … … 220 234 info._get_custom_execute_transition = &morpheo::behavioural::custom::default_get_custom_execute_transition; 221 235 info._get_custom_execute_reset = &morpheo::behavioural::custom::default_get_custom_execute_reset ; 236 info._get_vhdl_decod = &morpheo::behavioural::custom::default_get_vhdl_decod ; 237 info._get_vhdl_execute = &morpheo::behavioural::custom::default_get_vhdl_execute ; 222 238 return info; 223 239 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Custom/src/Custom_example.cpp
r72 r78 147 147 } 148 148 149 return NULL; // unimplemented function 150 149 return &(morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::instruction_illegal); // unimplemented function 151 150 } 152 151 … … 251 250 252 251 #undef FUNCTION 252 #define FUNCTION "custom::example_get_vhdl_decod" 253 custom_vhdl_t * example_get_vhdl_decod (void) 254 { 255 return NULL; // unimplemented function 256 } 257 258 #undef FUNCTION 259 #define FUNCTION "custom::example_get_vhdl_execute" 260 custom_vhdl_t * example_get_vhdl_execute (void) 261 { 262 return NULL; // unimplemented function 263 } 264 265 #undef FUNCTION 253 266 #define FUNCTION "custom::example_get_custom_information" 254 267 custom_information_t example_get_custom_information (uint32_t context) … … 265 278 info._get_custom_execute_transition = &morpheo::behavioural::custom::example_get_custom_execute_transition; 266 279 info._get_custom_execute_reset = &morpheo::behavioural::custom::example_get_custom_execute_reset ; 280 info._get_vhdl_decod = &morpheo::behavioural::custom::example_get_vhdl_decod ; 281 info._get_vhdl_execute = &morpheo::behavioural::custom::example_get_vhdl_execute ; 267 282 return info; 268 283 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/include/Parameters.h
r75 r78 32 32 public : ~Parameters () ; 33 33 34 public : std::stringmsg_error (void);34 public : Parameters_test msg_error (void); 35 35 36 36 public : std::string print (uint32_t depth); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/src/Parameters_msg_error.cpp
r75 r78 17 17 #undef FUNCTION 18 18 #define FUNCTION "Queue::msg_error" 19 std::stringParameters::msg_error(void)19 Parameters_test Parameters::msg_error(void) 20 20 { 21 21 log_printf(FUNC,Queue,FUNCTION,"Begin"); 22 22 23 std::string msg = ""; 24 25 return msg; 23 Parameters_test test("Queue"); 26 24 27 25 log_printf(FUNC,Queue,FUNCTION,"End"); 26 27 return test; 28 28 }; 29 29 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/src/test.cpp
r71 r78 7 7 */ 8 8 9 #define NB_ITERATION 1 9 #define NB_ITERATION 16 10 10 11 11 #include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/include/test.h" -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Parameters.h
r75 r78 37 37 public : ~Parameters () ; 38 38 39 public : std::stringmsg_error (void);39 public : Parameters_test msg_error (void); 40 40 public : std::string print (uint32_t depth); 41 41 public : friend std::ostream& operator<< (std::ostream& output_stream, -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/RegisterFile_Monolithic.h
r75 r78 52 52 private : counter_t * _stat_nb_read; 53 53 private : counter_t * _stat_nb_write; 54 private : counter_t * _stat_average_read ;55 private : counter_t * _stat_average_write;56 private : counter_t * _stat_percent_use_read ;57 private : counter_t * _stat_percent_use_write;58 54 #endif 59 55 … … 88 84 89 85 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 90 private : SC_REGISTER (Tdata_t) ** reg_DATA;86 private : Tdata_t * reg_DATA; 91 87 92 88 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/Parameters_msg_error.cpp
r75 r78 17 17 namespace registerfile_monolithic { 18 18 19 std::stringParameters::msg_error(void)19 Parameters_test Parameters::msg_error(void) 20 20 { 21 std::string msg = "";21 Parameters_test test("RegisterFile_Monolithic"); 22 22 23 23 if ((8*sizeof(Tdata_t)) < _size_word) 24 { 25 msg += " - type \"Tdata_t\" is too little to the size defined by size_word\n"; 26 msg += " * size_word : " + toString(_size_word) + "\n"; 27 msg += " * Tdata_t (bits): " + toString(8*(sizeof(Tdata_t))) + "\n"; 28 } 24 test.error("Type \"Tdata_t\" is too little to the size defined by size_word"); 29 25 30 26 if ((8*sizeof(Taddress_t)) < log2(_nb_word)) 31 { 32 msg += " - type \"Taddress_t\" is too little to the size defined by nb_word\n"; 33 msg += " * nb_word : " + toString(_nb_word) + "\n"; 34 msg += " > size (bits) : " + toString(log2(_nb_word)) + "\n"; 35 msg += " * Taddress_t (bits) : " + toString(8*(sizeof(Taddress_t))) + "\n"; 36 } 27 test.error("type \"Taddress_t\" is too little to the size defined by nb_word"); 37 28 38 29 if ((_nb_port_read + _nb_port_read_write) < 1) 39 { 40 msg += " - you need a read port\n"; 41 msg += " * nb_port_read : " + toString(_nb_port_read) + "\n"; 42 msg += " * nb_port_read_write : " + toString(_nb_port_read_write) + "\n"; 43 } 30 test.error("you need a read port"); 44 31 45 32 if ((_nb_port_write + _nb_port_read_write) < 1) 46 { 47 msg += " - you need a write port\n"; 48 msg += " * nb_port_write : " + toString(_nb_port_write) + "\n"; 49 msg += " * nb_port_read_write : " + toString(_nb_port_read_write) + "\n"; 50 } 51 // if (_nb_word < 2) 52 // { 53 // msg += " - nb_word must be >= 2\n"; 54 // msg += " * nb_word : " + toString(_nb_word) + "\n"; 55 // } 33 test.error("you need a write port"); 56 34 57 return msg;35 return test; 58 36 }; 59 37 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_allocation.cpp
r75 r78 120 120 121 121 // ----- Register 122 reg_DATA = new SC_REGISTER (Tdata_t) *[_param->_nb_word];122 reg_DATA = new Tdata_t [_param->_nb_word]; 123 123 124 for (uint32_t i=0; i<_param->_nb_word; i++)125 {126 std::string rename = "reg_DATA[" + toString(i) + "]";127 reg_DATA [i] = new SC_REGISTER (Tdata_t) (rename.c_str());128 }129 130 124 #ifdef POSITION 131 125 _component->generate_file(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_genMealy_read.cpp
r71 r78 29 29 else 30 30 address = 0; 31 Tdata_t data = REGISTER_READ(reg_DATA[address]);31 Tdata_t data = reg_DATA[address]; 32 32 33 33 log_printf(TRACE,RegisterFile,"genMealy_read","[%d] -> %.8x",static_cast<uint32_t>(address),static_cast<uint32_t>(data)); 34 34 35 #ifdef STATISTICS36 (*_stat_nb_read) ++;37 #endif38 35 // Write in registerFile 39 36 PORT_WRITE(out_READ_DATA[i],data); … … 61 58 address = 0; 62 59 63 data = REGISTER_READ(reg_DATA[address]);60 data = reg_DATA[address]; 64 61 65 62 log_printf(TRACE,RegisterFile,"genMealy_read","[%d] -> %.8x",static_cast<uint32_t>(address),static_cast<uint32_t>(data)); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_statistics_declaration.cpp
r75 r78 23 23 _stat_nb_read = _stat->create_variable("nb_read" ); 24 24 _stat_nb_write = _stat->create_variable("nb_write"); 25 26 _stat_average_read = _stat->create_counter("average_read" , "", "Average read by cycle");27 _stat_average_write = _stat->create_counter("average_write", "", "Average write by cycle");28 25 29 _stat _percent_use_read = _stat->create_counter("percent_use_read" , "%", "Read port usage");30 _stat _percent_use_write = _stat->create_counter("percent_use_write", "%", "Write port usage");26 _stat->create_expr_average_by_cycle("average_read" , "nb_read" , "", "Average read by cycle" ); 27 _stat->create_expr_average_by_cycle("average_write", "nb_write", "", "Average write by cycle"); 31 28 32 _stat->create_expr("average_read" , "/ nb_read cycle", false); 33 _stat->create_expr("average_write", "/ nb_write cycle", false); 34 35 _stat->create_expr("percent_use_read" , "/ * average_read 100 " + toString(_param->_nb_port_read +_param->_nb_port_read_write), false); 36 _stat->create_expr("percent_use_write", "/ * average_write 100 " + toString(_param->_nb_port_write+_param->_nb_port_read_write), false); 29 _stat->create_expr_percent ("percent_use_read" , "average_read" , toString(_param->_nb_port_read +_param->_nb_port_read_write), "Percent read by cycle" ); 30 _stat->create_expr_percent ("percent_use_write", "average_write", toString(_param->_nb_port_write+_param->_nb_port_read_write), "Percent write by cycle"); 37 31 38 32 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_transition.cpp
r75 r78 38 38 39 39 // Write in registerFile 40 REGISTER_WRITE(reg_DATA[address],data);40 reg_DATA[address] = data; 41 41 } 42 42 } … … 62 62 63 63 // Write in registerFile 64 REGISTER_WRITE(reg_DATA[address],data);64 reg_DATA[address] = data; 65 65 } 66 66 #ifdef STATISTICS -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/Parameters.h
r75 r78 64 64 public : ~Parameters () ; 65 65 66 public : std::stringmsg_error (void);66 public : Parameters_test msg_error (void); 67 67 public : std::string print (uint32_t depth); 68 68 public : friend std::ostream& operator<< (std::ostream& output_stream, -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/RegisterFile_Multi_Banked.h
r75 r78 73 73 74 74 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 75 private : SC_REGISTER (Tdata_t) *** reg_DATA;75 private : Tdata_t ** reg_DATA; 76 76 77 77 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/Parameters_msg_error.cpp
r75 r78 15 15 16 16 17 std::stringParameters::msg_error(void)17 Parameters_test Parameters::msg_error(void) 18 18 { 19 19 log_printf(FUNC,RegisterFile_Multi_Banked,"msg_error","Begin"); 20 20 21 std::string msg = "";21 Parameters_test test("RegisterFile_Multi_Banked"); 22 22 23 23 if (_nb_port_read < _nb_port_read_by_bank) 24 { 25 msg += " - Each bank read's port must be higher at number of read port\n"; 26 msg += " * nb_port_read : " + toString(_nb_port_read ) + "\n"; 27 msg += " * nb_port_read_by_bank : " + toString(_nb_port_read_by_bank) + "\n"; 28 } 24 test.error("Each bank read's port must be higher at number of read port"); 29 25 30 26 if (_nb_port_write < _nb_port_write_by_bank) 31 { 32 msg += " - Each bank write's port must be higher at number of write port\n"; 33 msg += " * nb_port_write : " + toString(_nb_port_write ) + "\n"; 34 msg += " * nb_port_write_by_bank : " + toString(_nb_port_write_by_bank) + "\n"; 35 } 27 test.error("Each bank write's port must be higher at number of write port"); 36 28 37 29 if (_nb_bank < 1) 38 { 39 msg += " - nb_bank must be higher at 1\n"; 40 msg += " * nb_bank : " + toString(_nb_bank ) + "\n"; 41 } 42 43 return msg; 30 test.error("nb_bank must be higher at 1"); 44 31 45 32 log_printf(FUNC,RegisterFile_Multi_Banked,"msg_error","End"); 33 34 return test; 46 35 }; 47 36 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_allocation.cpp
r75 r78 96 96 // ~~~~~[ Registers ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 97 97 98 reg_DATA = new SC_REGISTER (Tdata_t) ** [_param->_nb_bank];98 reg_DATA = new Tdata_t * [_param->_nb_bank]; 99 99 100 100 for (uint32_t i=0; i<_param->_nb_bank; i++) 101 101 { 102 reg_DATA [i] = new SC_REGISTER (Tdata_t) * [_param->_nb_word]; 103 104 for (uint32_t j=0; j<_param->_nb_word; j++) 105 { 106 std::string rename = "reg_DATA_" + toString(i) + "_" + toString(j); 107 reg_DATA [i][j] = new SC_REGISTER (Tdata_t) (rename.c_str()); 108 } 102 reg_DATA [i] = new Tdata_t [_param->_nb_word]; 109 103 } 110 104 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_full_crossbar_genMealy_read.cpp
r62 r78 62 62 log_printf(TRACE,RegisterFile_Multi_Banked,"full_crossbar_genMealy_read"," * bank_port : %d",j); 63 63 64 Tdata_t data = REGISTER_READ(reg_DATA[bank][num_reg]);64 Tdata_t data = reg_DATA[bank][num_reg]; 65 65 66 66 log_printf(TRACE,RegisterFile_Multi_Banked,"full_crossbar_genMealy_read"," * data : %d",data); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_partial_crossbar_genMealy_read.cpp
r62 r78 64 64 log_printf(TRACE,RegisterFile_Multi_Banked,"full_crossbar_genMealy_read"," * bank_port : %d",j); 65 65 66 Tdata_t data = REGISTER_READ(reg_DATA[bank][num_reg]);66 Tdata_t data = reg_DATA[bank][num_reg]; 67 67 68 68 log_printf(TRACE,RegisterFile_Multi_Banked,"full_crossbar_genMealy_read"," * data : %d",data); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_transition.cpp
r75 r78 31 31 32 32 // Write in registerFile 33 REGISTER_WRITE(reg_DATA[internal_WRITE_BANK[i]][internal_WRITE_NUM_REG[i]],data);33 reg_DATA[internal_WRITE_BANK[i]][internal_WRITE_NUM_REG[i]] = data; 34 34 } 35 35 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/include/Parameters.h
r75 r78 43 43 public : ~Parameters () ; 44 44 45 public : std::stringmsg_error (void);45 public : Parameters_test msg_error (void); 46 46 public : std::string print (uint32_t depth); 47 47 public : friend std::ostream& operator<< (std::ostream& output_stream, -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/include/RegisterFile.h
r75 r78 5 5 * $Id$ 6 6 * 7 * [ 7 * [ Description ] 8 8 * 9 9 */ … … 41 41 #endif 42 42 { 43 // -----[ 43 // -----[ fields ]---------------------------------------------------- 44 44 // Parameters 45 45 protected : const std::string _name; … … 54 54 55 55 #ifdef SYSTEMC 56 // ~~~~~[ 56 // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 57 57 // Interface 58 58 public : SC_CLOCK * in_CLOCK ; … … 73 73 #endif 74 74 75 // ~~~~~[ 75 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 76 76 protected : morpheo::behavioural::generic::registerfile::registerfile_monolithic ::RegisterFile_Monolithic ::RegisterFile_Monolithic * component_RegisterFile_Monolithic ; 77 77 protected : morpheo::behavioural::generic::registerfile::registerfile_multi_banked::RegisterFile_Multi_Banked::RegisterFile_Multi_Banked * component_RegisterFile_Multi_Banked; 78 78 79 // ~~~~~[ 79 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 80 80 81 // ~~~~~[ 81 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 82 82 83 // -----[ 83 // -----[ methods ]--------------------------------------------------- 84 84 85 85 #ifdef SYSTEMC -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/Parameters_msg_error.cpp
r75 r78 16 16 17 17 18 std::stringParameters::msg_error(void)18 Parameters_test Parameters::msg_error(void) 19 19 { 20 log_printf(FUNC,RegisterFile,"msg_error","Begin");21 22 20 if (_instance == instance_RegisterFile_Monolithic) 23 21 return _param_registerfile_monolithic ->msg_error(); 24 22 else 25 23 return _param_registerfile_multi_banked->msg_error(); 26 27 log_printf(FUNC,RegisterFile,"msg_error","End");28 24 }; 29 25 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/include/Parameters.h
r75 r78 34 34 public : ~Parameters () ; 35 35 36 public : std::stringmsg_error (void);36 public : Parameters_test msg_error (void); 37 37 public : std::string print (uint32_t depth); 38 38 public : friend std::ostream& operator<< (std::ostream& output_stream, -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Parameters_msg_error.cpp
r75 r78 17 17 18 18 19 std::stringParameters::msg_error(void)19 Parameters_test Parameters::msg_error(void) 20 20 { 21 21 log_printf(FUNC,Select_Priority_Fixed,"msg_error","Begin"); 22 22 23 std::string msg = "";23 Parameters_test test ("Select_Priority_Fixed"); 24 24 25 25 if ((_encoding_one_hot or _encoding_compact) == false) 26 { 27 msg += " - you must select a less one encoding\n"; 28 msg += " * encoding_one_hot : " + toString(_encoding_one_hot) + "\n"; 29 msg += " * encoding_compact : " + toString(_encoding_compact) + "\n"; 30 } 26 test.error("you must select a less one encoding"); 31 27 32 28 log_printf(FUNC,Select_Priority_Fixed,"msg_error","End"); 33 29 34 return msg;30 return test; 35 31 }; 36 32 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/TODO
r10 r78 1 1 - Ajouter quelques algorithme de selection 2 * Random 3 -> LFSR (?) qui ne tourne pas à chaque cycle mais à chaque in_access_val = '1' 2 4 * Round Robin 3 5 -> simple compteur de log2(N) bits 6 * Not Last Used 7 -> idem random mais : sauvegarde le dernier élément accéder. Si rand = last_elt, alors on renvoye not rand 4 8 * True LRU 5 9 -> fifo matériel. Un élément accéder sera placer en fin de fifo. 6 * Random7 -> LFSR (?) qui ne tourne pas à chaque cycle mais à chaque in_access_val = '1'10 * fifo 11 idem true LRU mais aucun evenement lors de l'accès -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/SelfTest/configuration.cfg
r42 r78 1 1 Victim_Pseudo_LRU 2 4 16 * 2# nb_entity3 1 4 * 2 # nb_access4 1 4 *2 # nb_update5 1 16 *2 # size_table 2 4 16 *4 # nb_entity 3 1 4 *4 # nb_access # 1 4 *4 # nb_update 4 1 16 *4 # size_table 5 0 1 +1 # table_global -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/SelfTest/src/main.cpp
r15 r78 14 14 cerr << "<Usage> " << exec << " name_instance list_params" << endl 15 15 << "list_params is :" << endl 16 << " - nb_entity (unsigned int)" << endl 17 << " - nb_access (unsigned int)" << endl 18 << " - nb_update (unsigned int)" << endl 19 << " - size_table (unsigned int)" << endl; 16 << " - nb_entity (unsigned int)" << endl 17 << " - nb_access (unsigned int)" << endl 18 // << " - nb_update (unsigned int)" << endl 19 << " - size_table (unsigned int)" << endl 20 << " - table_global (bool )" << endl; 20 21 exit (1); 21 22 } … … 30 31 usage (argv[0]); 31 32 32 const string name = argv[1]; 33 const uint32_t nb_entity = atoi(argv[2]); 34 const uint32_t nb_access = atoi(argv[3]); 35 const uint32_t nb_update = atoi(argv[4]); 36 const uint32_t size_table = atoi(argv[5]); 37 38 morpheo::behavioural::generic::victim::victim_pseudo_lru::Parameters param (nb_entity , 39 nb_access , 40 nb_update , 41 size_table); 33 const string name = argv[1]; 34 const uint32_t nb_entity = atoi(argv[2]); 35 const uint32_t nb_access = atoi(argv[3]); 36 // const uint32_t nb_update = atoi(argv[4]); 37 const uint32_t size_table = atoi(argv[4]); 38 const bool table_global = atoi(argv[5]); 39 morpheo::behavioural::generic::victim::victim_pseudo_lru::Parameters param 40 (nb_entity , 41 nb_access , 42 // nb_update , 43 size_table, 44 table_global); 42 45 43 46 test (name,param); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/SelfTest/src/test.cpp
r75 r78 15 15 cout << "<" << name << "> : Simulation SystemC" << endl; 16 16 17 if (param._nb_update < 1)18 {19 cerr << "<" << name << "> : To test, need a less one update's port" << endl;20 exit (EXIT_FAILURE);21 }22 23 17 try 24 18 { … … 45 39 param_stat, 46 40 #endif 47 param);41 ¶m); 48 42 49 43 #ifdef SYSTEMC … … 57 51 sc_signal<Tcontrol_t> ACCESS_ACK [param._nb_access]; 58 52 sc_signal<Taddress_t> ACCESS_ADDRESS [param._nb_access]; 53 sc_signal<Tcontrol_t> ACCESS_HIT [param._nb_access]; 59 54 sc_signal<Tentity_t > ACCESS_ENTITY [param._nb_access]; 60 61 sc_signal<Tcontrol_t> UPDATE_VAL [param._nb_update]; 62 sc_signal<Tcontrol_t> UPDATE_ACK [param._nb_update]; 63 sc_signal<Taddress_t> UPDATE_ADDRESS [param._nb_update]; 64 sc_signal<Tentity_t > UPDATE_ENTITY [param._nb_update]; 55 sc_signal<Tentity_t > ACCESS_VICTIM [param._nb_access]; 65 56 66 57 /******************************************************** … … 77 68 (*(_Victim_Pseudo_LRU-> in_ACCESS_VAL [i])) (ACCESS_VAL [i]); 78 69 (*(_Victim_Pseudo_LRU->out_ACCESS_ACK [i])) (ACCESS_ACK [i]); 79 if (param._size_ table>1)70 if (param._size_address>1) 80 71 (*(_Victim_Pseudo_LRU-> in_ACCESS_ADDRESS [i])) (ACCESS_ADDRESS [i]); 81 (*(_Victim_Pseudo_LRU->out_ACCESS_ENTITY [i])) (ACCESS_ENTITY [i]); 72 (*(_Victim_Pseudo_LRU-> in_ACCESS_HIT [i])) (ACCESS_HIT [i]); 73 (*(_Victim_Pseudo_LRU-> in_ACCESS_ENTITY [i])) (ACCESS_ENTITY [i]); 74 (*(_Victim_Pseudo_LRU->out_ACCESS_VICTIM [i])) (ACCESS_VICTIM [i]); 82 75 } 83 76 84 for (uint32_t i=0; i<param._nb_update; i++)85 {86 (*(_Victim_Pseudo_LRU-> in_UPDATE_VAL [i])) (UPDATE_VAL [i]);87 (*(_Victim_Pseudo_LRU->out_UPDATE_ACK [i])) (UPDATE_ACK [i]);88 if (param._size_table>1)89 (*(_Victim_Pseudo_LRU-> in_UPDATE_ADDRESS [i])) (UPDATE_ADDRESS [i]);90 (*(_Victim_Pseudo_LRU-> in_UPDATE_ENTITY [i])) (UPDATE_ENTITY [i]);91 }92 77 /******************************************************** 93 78 * Simulation - Begin … … 105 90 ACCESS_VAL[i].write(0); 106 91 } 107 for (uint32_t i=0; i<param._nb_update; i++)108 {109 UPDATE_VAL[i].write(0);110 }111 92 112 93 sc_start(5); 113 94 cout << "-----[ Test Update ]------------------------------" << endl; 114 for (uint32_t i=0; i<param._nb_update; i++) 115 { 116 UPDATE_VAL[i].write(1); 117 } 118 119 for (uint32_t j=0; j<param._size_table; j+=param._nb_update) 95 for (uint32_t i=0; i<param._nb_access; i++) 96 { 97 ACCESS_VAL[i].write(1); 98 ACCESS_HIT[i].write(1); 99 } 100 101 for (uint32_t j=0; j<param._size_table; j+=param._nb_access) 120 102 for (uint32_t k=0; k<param._nb_entity; k++) 121 103 { 122 104 cout << "time : " << static_cast<uint32_t>(sc_simulation_time()) << endl; 123 for (uint32_t i=0; i<param._nb_ update; i++)105 for (uint32_t i=0; i<param._nb_access; i++) 124 106 { 125 107 … … 131 113 addr = 0; 132 114 Tentity_t entity = (k+1)%param._nb_entity; 133 UPDATE_VAL [i].write(val );134 if (param._size_ table>1)135 UPDATE_ADDRESS [i].write(addr);136 UPDATE_ENTITY [i].write(entity);115 ACCESS_VAL [i].write(val ); 116 if (param._size_address>1) 117 ACCESS_ADDRESS [i].write(addr); 118 ACCESS_ENTITY [i].write(entity); 137 119 138 120 sc_start(0); 139 cout << "\t[" << i << "] " << val << " - " << UPDATE_ACK[i].read() << " addr : " << addr << " -> " << entity << endl;121 cout << "\t[" << i << "] " << val << " - " << ACCESS_ACK[i].read() << " addr : " << addr << " -> " << entity << endl; 140 122 } 141 123 sc_start(1); … … 143 125 144 126 145 for (uint32_t i=0; i<param._nb_ update; i++)146 { 147 UPDATE_VAL[i].write(0);127 for (uint32_t i=0; i<param._nb_access; i++) 128 { 129 ACCESS_VAL[i].write(0); 148 130 } 149 131 … … 151 133 152 134 cout << "-----[ Test Access ]------------------------------" << endl; 135 136 for (uint32_t i=0; i<param._nb_access; i++) 137 { 138 ACCESS_HIT[i].write(0); 139 } 153 140 154 141 … … 171 158 addr = 0; 172 159 ACCESS_VAL [i].write(val ); 173 if (param._size_ table>1)160 if (param._size_address>1) 174 161 ACCESS_ADDRESS [i].write(addr); 175 162 176 163 sc_start(0); 177 164 178 Tentity_t entity = ACCESS_ ENTITY[i].read();165 Tentity_t entity = ACCESS_VICTIM [i].read(); 179 166 180 167 cout << "\t[" << i << "] " << val << " - " << ACCESS_ACK[i].read() << " addr : " << addr << " -> " << entity << endl; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Parameters.h
r75 r78 24 24 public : const uint32_t _nb_entity ; // number of entity 25 25 public : const uint32_t _nb_access ; // number of port to select an entity 26 26 //public : const uint32_t _nb_update ; // number of port to update the internal entity 27 27 public : const uint32_t _size_table; // Size of victim_pseudo_lru's table 28 public : const bool _table_global; 29 public : const uint32_t _size_address; 28 30 29 31 //-----[ methods ]----------------------------------------------------------- 30 32 public : Parameters (uint32_t nb_entity , 31 33 uint32_t nb_access , 32 uint32_t nb_update , 33 uint32_t size_table); 34 // uint32_t nb_update , 35 uint32_t size_table, 36 bool table_global); 34 37 public : Parameters (Parameters & param) ; 35 38 public : ~Parameters () ; 36 39 37 public : std::stringmsg_error (void);38 public : std::string print (uint32_t depth);39 public : friend std::ostream& operator<< (std::ostream& output_stream,40 morpheo::behavioural::generic::victim::victim_pseudo_lru::Parameters & x);40 public : Parameters_test msg_error (void); 41 public : std::string print (uint32_t depth); 42 public : friend std::ostream& operator<< (std::ostream& output_stream, 43 morpheo::behavioural::generic::victim::victim_pseudo_lru::Parameters & x); 41 44 }; 42 45 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Types.h
r75 r78 9 9 */ 10 10 11 #include "Behavioural/ include/Types.h"11 #include "Behavioural/Generic/Victim/include/Types.h" 12 12 13 13 namespace morpheo { … … 17 17 namespace victim_pseudo_lru { 18 18 19 typedef uint32_t Taddress_t; 20 typedef uint32_t Tentity_t; 19 class entry_t 20 { 21 // Numerotation of victim_pseudo_lru's tree 22 // Tree of Pseudo-LRU 23 // 24 // | d2 [3] | 25 // | 0_______|_______1 | 26 // | | | | 27 // | d1 [1] [5] | 28 // | 0___|___1 0___|___1 | 29 // | | | | | | 30 // | d0 [0] [2] [4] [6] | 31 // | 0_|_1 0_|_1 0_|_1 0_|_1 | 32 // | | | | | | | | | | 33 // | Way Way Way Way Way Way Way Way | 34 // | 0 1 2 3 4 5 6 7 | 35 // 36 // Access : Way N with N=2*n -> bit 2*n = 0 37 // with N=2*n+1 -> bit 2*n = 1 38 // 39 // if bit = B, depth = D, next_B = B+D if B==1 40 // = B-D if B==0 41 // 42 // Update : 43 44 private : bool * _entry; 45 private : uint32_t _size; 46 47 public : entry_t () 48 { 49 }; 50 public : entry_t (uint32_t size) : _size (size) 51 { 52 _entry = new bool [size]; 53 54 // initialisation 55 for (uint32_t i=0; i<size; i++) 56 _entry [i] = false; 57 } 58 59 public : ~entry_t () 60 { 61 delete _entry; 62 } 63 64 private : uint32_t one_access (uint32_t index, uint32_t offset) 65 { 66 bool val = _entry[index]; 67 68 // Compute next slot 69 if (val == true) 70 return index + offset; 71 else 72 return index - offset; 73 } 74 75 public : uint32_t access () 76 { 77 uint32_t index = (_size>>1)-1; // middle 78 79 for (int32_t i=static_cast<uint32_t>(log2(_size)-1); i>= 1; i--) 80 { 81 index = one_access (index,(1<<(i-1))); 82 } 83 index = one_access (index,0); 84 85 // reverse by one_access make always a reverse 86 uint32_t offset = (_entry[index]==true)?1:0; 87 88 return index+offset; 89 } 90 91 private : uint32_t one_update (uint32_t index, uint32_t offset, uint32_t value) 92 { 93 uint32_t mask = (offset==0)?1:(offset<<1); 94 bool val = ((value & mask) != 0); 95 96 // reverse 97 _entry[index] = not val; 98 99 if (val == true) 100 // Compute next slot 101 return index + offset; 102 else 103 return index - offset; 104 } 105 public : void update (uint32_t value) 106 { 107 uint32_t index = (_size>>1)-1; // middle 108 109 for (int32_t i=static_cast<uint32_t>(log2(_size)-1); i>=1; i--) 110 { 111 index = one_update (index,1<<(i-1),value); 112 } 113 index = one_update (index,0,value); 114 } 115 116 public : std::string print () 117 { 118 std::string res = ""; 119 120 for (int32_t i=static_cast<int32_t>(_size)-1; i>=0; i--) 121 res += toString(_entry[i]) + " "; 122 123 return res; 124 } 125 }; 21 126 22 127 }; // end namespace victim_pseudo_lru -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Victim_Pseudo_LRU.h
r75 r78 5 5 * $Id$ 6 6 * 7 * [ 7 * [ Description ] 8 8 * 9 9 */ … … 53 53 #endif 54 54 { 55 // -----[ internal class ]-------------------------------------------- 56 protected : class entry_t 57 { 58 // Numerotation of victim_pseudo_lru's tree 59 // Tree of Pseudo-LRU 60 // 61 // | d2 [3] | 62 // | 0_______|_______1 | 63 // | | | | 64 // | d1 [1] [5] | 65 // | 0___|___1 0___|___1 | 66 // | | | | | | 67 // | d0 [0] [2] [4] [6] | 68 // | 0_|_1 0_|_1 0_|_1 0_|_1 | 69 // | | | | | | | | | | 70 // | Way Way Way Way Way Way Way Way | 71 // | 0 1 2 3 4 5 6 7 | 72 // 73 // Access : Way N with N=2*n -> bit 2*n = 0 74 // with N=2*n+1 -> bit 2*n = 1 75 // 76 // if bit = B, depth = D, next_B = B+D if B==1 77 // = B-D if B==0 78 // 79 // Update : 55 // -----[ fields ]---------------------------------------------------- 56 // Parameters 57 protected : const std::string _name; 80 58 81 private : bool * _entry; 82 private : uint32_t _size; 83 84 public : entry_t () 85 { 86 }; 87 public : entry_t (uint32_t size) : _size (size) 88 { 89 _entry = new bool [size]; 90 91 // initialisation 92 for (uint32_t i=0; i<size; i++) 93 _entry [i] = false; 94 } 95 96 public : ~entry_t () 97 { 98 delete _entry; 99 } 100 101 private : uint32_t one_access (uint32_t index, uint32_t offset) 102 { 103 bool val = _entry[index]; 104 105 // Compute next slot 106 if (val == true) 107 return index + offset; 108 else 109 return index - offset; 110 } 111 112 public : uint32_t access () 113 { 114 uint32_t index = (_size>>1)-1; // medium 115 116 for (int32_t i=static_cast<uint32_t>(log2(_size)-1); i>= 1; i--) 117 { 118 index = one_access (index,(1<<(i-1))); 119 } 120 index = one_access (index,0); 121 122 // reverse by one_access make always a reverse 123 uint32_t offset = (_entry[index]==true)?1:0; 124 125 return index+offset; 126 } 127 128 private : uint32_t one_update (uint32_t index, uint32_t offset, uint32_t value) 129 { 130 uint32_t mask = (offset==0)?1:(offset<<1); 131 bool val = ((value & mask) != 0); 132 133 // reverse 134 _entry[index] = not val; 135 136 if (val == true) 137 // Compute next slot 138 return index + offset; 139 else 140 return index - offset; 141 } 142 public : void update (uint32_t value) 143 { 144 uint32_t index = (_size>>1)-1; // medium 145 146 for (int32_t i=static_cast<uint32_t>(log2(_size)-1); i>=1; i--) 147 { 148 index = one_update (index,1<<(i-1),value); 149 } 150 index = one_update (index,0,value); 151 } 152 153 public : std::string print () 154 { 155 std::string res = ""; 156 157 for (int32_t i=static_cast<int32_t>(_size)-1; i>=0; i--) 158 res += toString(_entry[i]) + " "; 159 160 return res; 161 } 162 163 }; 164 // -----[ fields ]---------------------------------------------------- 165 // Parameters 166 protected : const std::string _name; 167 168 protected : const Parameters _param; 59 protected : const Parameters * _param; 169 60 #ifdef STATISTICS 170 61 public : Stat * _stat; … … 175 66 176 67 #ifdef SYSTEMC 177 // ~~~~~[ 68 // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 178 69 // Interface 179 70 public : SC_CLOCK * in_CLOCK ; … … 184 75 public : SC_OUT(Tcontrol_t) ** out_ACCESS_ACK ; 185 76 public : SC_IN (Taddress_t) ** in_ACCESS_ADDRESS; 186 public : SC_OUT(Tentity_t ) ** out_ACCESS_ENTITY ; 187 // Interface update 188 public : SC_IN (Tcontrol_t) ** in_UPDATE_VAL ; 189 public : SC_OUT(Tcontrol_t) ** out_UPDATE_ACK ; 190 public : SC_IN (Taddress_t) ** in_UPDATE_ADDRESS; 191 public : SC_IN (Tentity_t ) ** in_UPDATE_ENTITY ; 77 public : SC_IN (Tcontrol_t) ** in_ACCESS_HIT ; // hit = 1 : update next_victim with in_entity else with out_victim 78 public : SC_IN (Tentity_t ) ** in_ACCESS_ENTITY ; 79 public : SC_OUT(Tentity_t ) ** out_ACCESS_VICTIM ; 192 80 193 81 // Interface update 194 // ~~~~~[ 82 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 195 83 private : entry_t ** reg_TABLE; 196 84 197 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 198 private : Tentity_t * internal_ACCESS_ENTITY; 85 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 86 private : Tcontrol_t * internal_ACCESS_ACK ; 87 private : Tentity_t * internal_ACCESS_VICTIM; 199 88 #endif 200 89 201 // -----[ 90 // -----[ methods ]--------------------------------------------------- 202 91 203 92 #ifdef SYSTEMC … … 205 94 #endif 206 95 207 public : Victim_Pseudo_LRU ( 96 public : Victim_Pseudo_LRU 97 ( 208 98 #ifdef SYSTEMC 209 99 sc_module_name name, 210 100 #else 211 101 std::string name, 212 102 #endif 213 103 #ifdef STATISTICS 214 104 morpheo::behavioural::Parameters_Statistics * param_statistics, 215 105 #endif 216 Parametersparam );106 Parameters * param ); 217 107 218 108 public : Victim_Pseudo_LRU (Parameters param ); … … 224 114 225 115 public : void transition (void); 226 public : void genM ealy_access(void);116 public : void genMoore (void); 227 117 #endif 228 118 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Parameters.cpp
r15 r78 17 17 Parameters::Parameters (uint32_t nb_entity , 18 18 uint32_t nb_access , 19 uint32_t nb_update , 20 uint32_t size_table): 19 // uint32_t nb_update , 20 uint32_t size_table, 21 bool table_global): 21 22 _nb_entity (nb_entity ), 22 23 _nb_access (nb_access ), 23 _nb_update (nb_update ), 24 _size_table (size_table) 24 // _nb_update (nb_update ), 25 _size_table ((table_global == true)?1:size_table), 26 _table_global (table_global), 27 _size_address (size_table) 25 28 { 26 29 test(); … … 30 33 _nb_entity (param._nb_entity ), 31 34 _nb_access (param._nb_access ), 32 _nb_update (param._nb_update ), 33 _size_table (param._size_table) 35 // _nb_update (param._nb_update ), 36 _size_table (param._size_table), 37 _table_global(param._table_global), 38 _size_address(param._size_address) 34 39 { 35 40 test(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Parameters_msg_error.cpp
r75 r78 16 16 namespace victim_pseudo_lru { 17 17 18 std::stringParameters::msg_error(void)18 Parameters_test Parameters::msg_error(void) 19 19 { 20 std::string msg = "";20 Parameters_test test ("Victime_Pseudo_LRU"); 21 21 22 22 if (_nb_entity < 2) 23 { 24 msg += " - nb_entity must be >= 2\n"; 25 msg += " * nb_entity : " + toString(_nb_entity) + "\n"; 26 } 27 23 test.error("nb_entity must be >= 2"); 24 28 25 if (is_positive(log2(_nb_entity)) == false) 29 { 30 msg += " - nb_entity is not a power of 2\n"; 31 msg += " * nb_entity : " + toString(_nb_entity) + "\n"; 32 } 26 test.error("nb_entity is not a power of 2"); 33 27 34 28 if (_nb_access < 1) 35 { 36 msg += " - nb_access must be >= 1\n"; 37 msg += " * nb_access : " + toString(_nb_access) + "\n"; 38 } 29 test.error("nb_access must be >= 1"); 39 30 40 31 if (_size_table < 1) 41 { 42 msg += " - size_table must be >= 1\n"; 43 msg += " * size_table : " + toString(_size_table) + "\n"; 44 } 32 test.error("size_table must be >= 1"); 45 33 46 34 if (is_between_inclusive (static_cast<uint32_t>(log2(_nb_entity)),0 ,(8*sizeof(Tentity_t))) == false) 47 { 48 msg += " - type \"Tentity_t\" is too little to the size defined by nb_entity\n"; 49 msg += " * nb_entity : " + toString(_nb_entity) + "\n"; 50 msg += " * Tentity_t (bits) : " + toString(8*(sizeof(Tentity_t))) + "\n"; 51 } 35 test.error("type \"Tentity_t\" is too little to the size defined by nb_entity"); 52 36 53 37 if (is_between_inclusive (static_cast<uint32_t>(log2(_size_table)),0 ,(8*sizeof(Taddress_t))) == false) 54 { 55 msg += " - type \"Taddress_t\" is too little to the size defined by size_table\n"; 56 msg += " * size_table : " + toString(_size_table) + "\n"; 57 msg += " > size (bits) : " + toString(log2(_size_table)) + "\n"; 58 msg += " * Taddress_t (bits) : " + toString(8*(sizeof(Taddress_t))) + "\n"; 59 } 38 test.error("type \"Taddress_t\" is too little to the size defined by size_table"); 60 39 61 62 63 return msg; 40 return test; 64 41 }; 65 42 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Parameters_print.cpp
r75 r78 21 21 22 22 xml.balise_open("victim_pseudo_lru"); 23 xml.singleton_begin("nb_entity "); xml.attribut("value",toString(_nb_entity )); xml.singleton_end(); 24 xml.singleton_begin("nb_access "); xml.attribut("value",toString(_nb_access )); xml.singleton_end(); 25 xml.singleton_begin("nb_update "); xml.attribut("value",toString(_nb_update )); xml.singleton_end(); 26 xml.singleton_begin("size_table"); xml.attribut("value",toString(_size_table)); xml.singleton_end(); 23 xml.singleton_begin("nb_entity "); xml.attribut("value",toString(_nb_entity )); xml.singleton_end(); 24 xml.singleton_begin("nb_access "); xml.attribut("value",toString(_nb_access )); xml.singleton_end(); 25 // xml.singleton_begin("nb_update "); xml.attribut("value",toString(_nb_update )); xml.singleton_end(); 26 xml.singleton_begin("size_table "); xml.attribut("value",toString(_size_table )); xml.singleton_end(); 27 xml.singleton_begin("table_global"); xml.attribut("value",toString(_table_global)); xml.singleton_end(); 27 28 xml.balise_close(); 28 29 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU.cpp
r75 r78 22 22 morpheo::behavioural::Parameters_Statistics * param_statistics, 23 23 #endif 24 morpheo::behavioural::generic::victim::victim_pseudo_lru::Parameters param ):24 morpheo::behavioural::generic::victim::victim_pseudo_lru::Parameters * param ): 25 25 _name (name) 26 26 ,_param (param) … … 52 52 sensitive << (*(in_CLOCK)).pos(); 53 53 54 SC_METHOD (genM ealy_access);54 SC_METHOD (genMoore); 55 55 dont_initialize (); 56 56 sensitive << (*(in_CLOCK)).neg(); 57 for (uint32_t i=0; i<_param._nb_access; i++)58 {59 sensitive << *(in_ACCESS_VAL [i]);60 if (_param._size_table>1)61 sensitive << *(in_ACCESS_ADDRESS [i]);62 }63 57 64 58 #ifdef SYSTEMCASS_SPECIFIC 65 log_printf(TRACE,Victim_Pseudo_LRU,"Victim_Pseudo_LRU","List dependency information");66 // List dependency information67 for (uint32_t i=0; i<_param._nb_access; i++)68 {69 (*(out_ACCESS_ENTITY [i])) (*( in_ACCESS_VAL [i]));70 if (_param._size_table>1)71 (*(out_ACCESS_ENTITY [i])) (*( in_ACCESS_ADDRESS [i]));72 }73 59 #endif 74 60 75 61 // Constant - ack is always at one 76 for (uint32_t i=0; i<_param._nb_access; i++) 77 PORT_WRITE (out_ACCESS_ACK [i], 1); 78 for (uint32_t i=0; i<_param._nb_update; i++) 79 PORT_WRITE (out_UPDATE_ACK [i], 1); 62 for (uint32_t i=0; i<_param->_nb_access; i++) 63 { 64 internal_ACCESS_ACK [i] = 1; 65 PORT_WRITE (out_ACCESS_ACK [i], internal_ACCESS_ACK [i]); 66 } 80 67 81 68 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_allocation.cpp
r75 r78 8 8 9 9 #include "Behavioural/Generic/Victim/Victim_Pseudo_LRU/include/Victim_Pseudo_LRU.h" 10 #include "Behavioural/include/Allocation.h" 10 11 11 12 namespace morpheo { … … 42 43 // ~~~~~[ Interface : "access" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 43 44 { 44 in_ACCESS_VAL = new SC_IN (Tcontrol_t) * [_param._nb_access]; 45 out_ACCESS_ACK = new SC_OUT(Tcontrol_t) * [_param._nb_access]; 46 if (_param._size_table>1) 47 in_ACCESS_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_access]; 48 out_ACCESS_ENTITY = new SC_OUT(Tentity_t ) * [_param._nb_access]; 49 50 for (uint32_t i=0; i<_param._nb_access; i++) 51 { 52 Interface_fifo * interface = _interfaces->set_interface("access_"+toString(i) 53 #ifdef POSITION 54 , IN ,WEST, "Access" 55 #endif 56 ); 45 ALLOC1_INTERFACE("access",IN,WEST, "Access", _param->_nb_access); 57 46 58 in_ACCESS_VAL [i] = interface->set_signal_valack_in ("val" , VAL); 59 out_ACCESS_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); 60 61 if (_param._size_table>1) 62 in_ACCESS_ADDRESS [i] = interface->set_signal_in <Taddress_t> ("address",static_cast<uint32_t>(log2(_param._size_table))); 63 out_ACCESS_ENTITY [i] = interface->set_signal_out <Tentity_t> ("entity" ,static_cast<uint32_t>(log2(_param._nb_entity ))); 64 } 47 ALLOC1_VALACK_IN ( in_ACCESS_VAL ,VAL); 48 ALLOC1_VALACK_OUT(out_ACCESS_ACK ,ACK); 49 ALLOC1_SIGNAL_IN ( in_ACCESS_HIT ,"hit" ,Tcontrol_t,1); 50 ALLOC1_SIGNAL_IN ( in_ACCESS_ADDRESS,"address",Taddress_t,log2(_param->_size_address)); 51 ALLOC1_SIGNAL_IN ( in_ACCESS_ENTITY ,"entity" ,Tentity_t ,log2(_param->_nb_entity )); 52 ALLOC1_SIGNAL_OUT(out_ACCESS_VICTIM ,"victim" ,Tentity_t ,log2(_param->_nb_entity )); 65 53 } 66 54 67 // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 68 69 { 70 in_UPDATE_VAL = new SC_IN (Tcontrol_t) * [_param._nb_update]; 71 out_UPDATE_ACK = new SC_OUT(Tcontrol_t) * [_param._nb_update]; 72 if (_param._size_table>1) 73 in_UPDATE_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_update]; 74 in_UPDATE_ENTITY = new SC_IN (Tentity_t ) * [_param._nb_update]; 75 76 for (uint32_t i=0; i<_param._nb_update; i++) 77 { 78 Interface_fifo * interface = _interfaces->set_interface("update_"+toString(i) 79 #ifdef POSITION 80 , IN ,EAST, "Update" 81 #endif 82 ); 55 // -----[ Register ]--------------------------------------------------- 56 reg_TABLE = new entry_t * [_param->_size_table]; 83 57 84 in_UPDATE_VAL [i] = interface->set_signal_valack_in ("val" , VAL); 85 out_UPDATE_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); 86 if (_param._size_table>1) 87 in_UPDATE_ADDRESS [i] = interface->set_signal_in <Taddress_t> ("address",static_cast<uint32_t>(log2(_param._size_table))); 88 in_UPDATE_ENTITY [i] = interface->set_signal_in <Tentity_t> ("entity" ,static_cast<uint32_t>(log2(_param._nb_entity ))); 89 } 90 } 91 // -----[ Register ]--------------------------------------------------- 92 reg_TABLE = new entry_t * [_param._size_table]; 93 94 for (uint32_t i=0; i<_param._size_table; i++) 95 reg_TABLE [i] = new entry_t (_param._nb_entity); 58 for (uint32_t i=0; i<_param->_size_table; i++) 59 reg_TABLE [i] = new entry_t (_param->_nb_entity); 96 60 97 61 // -----[ Internal ]--------------------------------------------------- 98 internal_ACCESS_ENTITY = new Tentity_t [_param._nb_entity]; 62 internal_ACCESS_ACK = new Tcontrol_t [_param->_nb_access]; 63 internal_ACCESS_VICTIM = new Tentity_t [_param->_nb_access]; 99 64 100 65 #ifdef POSITION -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_deallocation.cpp
r42 r78 3 3 * $Id$ 4 4 * 5 * [ 5 * [ Description ] 6 6 * 7 7 */ … … 19 19 delete in_CLOCK; 20 20 delete in_NRESET; 21 // -----[ 21 // -----[ Interface access ]------------------------------------------- 22 22 delete [] in_ACCESS_VAL ; 23 23 delete [] out_ACCESS_ACK ; 24 if (_param ._size_table>1)24 if (_param->_size_address>1) 25 25 delete [] in_ACCESS_ADDRESS; 26 delete [] out_ACCESS_ENTITY ; 26 delete [] in_ACCESS_HIT ; 27 delete [] in_ACCESS_ENTITY ; 28 delete [] out_ACCESS_VICTIM ; 27 29 28 // -----[ Interface update ]------------------------------------------- 29 delete [] in_UPDATE_VAL ; 30 delete [] out_UPDATE_ACK ; 31 if (_param._size_table>1) 32 delete [] in_UPDATE_ADDRESS; 33 delete [] in_UPDATE_ENTITY ; 34 35 // -----[ Register ]--------------------------------------------------- 30 // -----[ Register ]--------------------------------------------------- 36 31 delete [] reg_TABLE; 37 32 38 // -----[ Internal ]--------------------------------------------------- 39 delete [] internal_ACCESS_ENTITY; 33 // -----[ Internal ]--------------------------------------------------- 34 delete [] internal_ACCESS_ACK ; 35 delete [] internal_ACCESS_VICTIM; 40 36 41 #ifdef POSITION42 37 delete _component; 43 #else44 delete _interfaces;45 #endif46 38 }; 47 39 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_genMoore.cpp
r59 r78 15 15 namespace victim_pseudo_lru { 16 16 17 void Victim_Pseudo_LRU::genM ealy_access(void)17 void Victim_Pseudo_LRU::genMoore (void) 18 18 { 19 for (uint32_t i=0; i<_param ._nb_access; i++)19 for (uint32_t i=0; i<_param->_nb_access; i++) 20 20 { 21 if (PORT_READ (in_ACCESS_VAL[i]) == 1) 22 { 23 Taddress_t address; 21 Taddress_t address = (_param->_size_table>1)?PORT_READ(in_ACCESS_ADDRESS[i]):0; 24 22 25 if (_param._size_table>1) 26 address = PORT_READ (in_ACCESS_ADDRESS[i]); 27 else 28 address = 0; 29 30 internal_ACCESS_ENTITY[i] = reg_TABLE[address]->access(); 31 } 32 else 33 { 34 internal_ACCESS_ENTITY[i] = 0; 35 } 23 internal_ACCESS_VICTIM[i] = reg_TABLE[address]->access(); 36 24 37 PORT_WRITE(out_ACCESS_ ENTITY[i], internal_ACCESS_ENTITY[i]);25 PORT_WRITE(out_ACCESS_VICTIM[i], internal_ACCESS_VICTIM[i]); 38 26 }//end for i 39 27 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_transition.cpp
r75 r78 17 17 void Victim_Pseudo_LRU::transition (void) 18 18 { 19 #ifdef STATISTICS 20 uint32_t _stat_nb_access = 0; 21 uint32_t _stat_nb_update = 0; 22 #endif 19 for (uint32_t i=0; i<_param->_nb_access; i++) 20 { 21 if (PORT_READ (in_ACCESS_VAL[i]) and internal_ACCESS_ACK) 22 { 23 Taddress_t address = (_param->_size_table>1)?PORT_READ(in_ACCESS_ADDRESS[i]):0; 24 Tentity_t entity; 23 25 24 for (uint32_t i=0; i<_param._nb_access; i++) 25 { 26 // Access ... (ack is always at 1) 27 if (PORT_READ (in_ACCESS_VAL[i]) == 1) 28 { 29 #ifdef STATISTICS 30 _stat_nb_access ++; 31 #endif 32 Taddress_t address; 26 if (PORT_READ(in_ACCESS_HIT [i])) 27 { 28 // Hit : don't need a victim 29 // #ifdef STATISTICS 30 // _stat_nb_update ++; 31 // #endif 32 entity = PORT_READ(in_ACCESS_ENTITY[i]); 33 } 34 else 35 { 36 // Miss : need victim 37 // #ifdef STATISTICS 38 // _stat_nb_access ++; 39 // #endif 40 entity = internal_ACCESS_VICTIM[i]; 41 } 33 42 34 if (_param._size_table>1) 35 address = PORT_READ (in_ACCESS_ADDRESS[i]); 36 else 37 address = 0; 38 39 reg_TABLE[address]->update(internal_ACCESS_ENTITY[i]); 43 reg_TABLE[address]->update(entity); 40 44 } 41 45 }//end for i 42 46 43 for (uint32_t i=0; i<_param._nb_update; i++)44 {45 // Update ... (ack is always at 1)46 if (PORT_READ (in_UPDATE_VAL[i]) == 1)47 {48 #ifdef STATISTICS49 _stat_nb_update ++;50 #endif51 52 Taddress_t address;53 54 if (_param._size_table>1)55 address = PORT_READ (in_UPDATE_ADDRESS[i]);56 else57 address = 0;58 59 reg_TABLE[address]->update(PORT_READ(in_UPDATE_ENTITY[i]));60 }61 }//end for i62 63 47 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) 64 48 end_cycle (); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_body.cpp
r75 r78 35 35 vhdl->set_body ("-- Way Way Way Way Way Way Way Way "); 36 36 vhdl->set_body ("-- 0 1 2 3 4 5 6 7 "); 37 for (uint32_t i=0; i<_param ._nb_access; i++)37 for (uint32_t i=0; i<_param->_nb_access; i++) 38 38 { 39 39 vhdl->set_body (""); … … 42 42 std::string access_address; 43 43 44 if (_param ._size_table>1)44 if (_param->_size_table>1) 45 45 access_address = "conv_integer(in_ACCESS_"+toString(i)+"_ADDRESS)"; 46 46 else … … 50 50 vhdl->set_body (""); 51 51 52 for (int32_t j=static_cast<uint32_t>(log2(_param ._nb_entity)-1); j>=0; j--)52 for (int32_t j=static_cast<uint32_t>(log2(_param->_nb_entity)-1); j>=0; j--) 53 53 { 54 54 vhdl->set_body ("access_entity_"+toString(i)+"("+toString(j)+") <= "); … … 56 56 uint32_t cpt=0; 57 57 58 for (int32_t k=(1<<j)-1; k<static_cast<int32_t>(_param ._nb_entity-1); k+=(1<<(j+1)))58 for (int32_t k=(1<<j)-1; k<static_cast<int32_t>(_param->_nb_entity-1); k+=(1<<(j+1))) 59 59 { 60 60 std::string cond = ""; 61 61 62 62 // Create the condition 63 for (uint32_t l=j+1; l<static_cast<uint32_t>(log2(_param ._nb_entity));l++)63 for (uint32_t l=j+1; l<static_cast<uint32_t>(log2(_param->_nb_entity));l++) 64 64 { 65 65 if (l==static_cast<uint32_t>(j+1)) … … 85 85 vhdl->set_body (""); 86 86 vhdl->set_body ("-- port access"); 87 for (uint32_t i=0; i<_param ._nb_access; i++)88 for (int32_t j=static_cast<uint32_t>(log2(_param ._nb_entity)-1); j>=0; j--)87 for (uint32_t i=0; i<_param->_nb_access; i++) 88 for (int32_t j=static_cast<uint32_t>(log2(_param->_nb_entity)-1); j>=0; j--) 89 89 { 90 90 uint32_t cpt=0; 91 91 92 for (int32_t k=(1<<j)-1; k<static_cast<int32_t>(_param ._nb_entity-1); k+=(1<<(j+1)))92 for (int32_t k=(1<<j)-1; k<static_cast<int32_t>(_param->_nb_entity-1); k+=(1<<(j+1))) 93 93 { 94 94 bool have_cond = false; … … 96 96 97 97 // condition to change the bit 98 for (uint32_t l=j+1; l<static_cast<uint32_t>(log2(_param ._nb_entity));l++)98 for (uint32_t l=j+1; l<static_cast<uint32_t>(log2(_param->_nb_entity));l++) 99 99 { 100 100 have_cond = true; … … 118 118 vhdl->set_body (""); 119 119 vhdl->set_body ("-- port update"); 120 for (uint32_t i=0; i<_param ._nb_update; i++)121 for (int32_t j=static_cast<uint32_t>(log2(_param ._nb_entity)-1); j>=0; j--)120 for (uint32_t i=0; i<_param->_nb_update; i++) 121 for (int32_t j=static_cast<uint32_t>(log2(_param->_nb_entity)-1); j>=0; j--) 122 122 { 123 123 uint32_t cpt=0; 124 124 125 for (int32_t k=(1<<j)-1; k<static_cast<int32_t>(_param ._nb_entity-1); k+=(1<<(j+1)))125 for (int32_t k=(1<<j)-1; k<static_cast<int32_t>(_param->_nb_entity-1); k+=(1<<(j+1))) 126 126 { 127 127 bool have_cond = false; … … 129 129 130 130 // condition to change the bit 131 for (uint32_t l=j+1; l<static_cast<uint32_t>(log2(_param ._nb_entity));l++)131 for (uint32_t l=j+1; l<static_cast<uint32_t>(log2(_param->_nb_entity));l++) 132 132 { 133 133 have_cond = true; … … 146 146 std::string update_address; 147 147 148 if (_param ._size_table>1)148 if (_param->_size_table>1) 149 149 update_address = "conv_integer(in_UPDATE_"+toString(i)+"_ADDRESS)"; 150 150 else … … 168 168 vhdl->set_body ("\tif in_CLOCK'event and in_CLOCK = '1' then"); 169 169 vhdl->set_body ("\t\t-- Access port"); 170 for (uint32_t i=0; i<_param ._nb_access; i++)170 for (uint32_t i=0; i<_param->_nb_access; i++) 171 171 { 172 172 std::string access_address; 173 173 174 if (_param ._size_table>1)174 if (_param->_size_table>1) 175 175 access_address = "conv_integer(in_ACCESS_"+toString(i)+"_ADDRESS)"; 176 176 else … … 183 183 184 184 vhdl->set_body ("\t\t-- Update port"); 185 for (uint32_t i=0; i<_param ._nb_update; i++)185 for (uint32_t i=0; i<_param->_nb_update; i++) 186 186 { 187 187 std::string update_address; 188 188 189 if (_param ._size_table>1)189 if (_param->_size_table>1) 190 190 update_address = "conv_integer(in_UPDATE_"+toString(i)+"_ADDRESS)"; 191 191 else … … 207 207 vhdl->set_body ("-- Ack is always "); 208 208 vhdl->set_body (""); 209 for (uint32_t i=0; i<_param ._nb_access; i++)209 for (uint32_t i=0; i<_param->_nb_access; i++) 210 210 { 211 211 vhdl->set_body ("out_ACCESS_"+toString(i)+"_ACK <= '1';"); … … 213 213 } 214 214 vhdl->set_body (""); 215 for (uint32_t i=0; i<_param ._nb_update; i++)215 for (uint32_t i=0; i<_param->_nb_update; i++) 216 216 { 217 217 vhdl->set_body ("out_UPDATE_"+toString(i)+"_ACK <= '1';"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Victim/Victim_Pseudo_LRU/src/Victim_Pseudo_LRU_vhdl_declaration.cpp
r42 r78 18 18 void Victim_Pseudo_LRU::vhdl_declaration (Vhdl * & vhdl) 19 19 { 20 vhdl->set_type ("Ttable", "array (" + toString(_param ._size_table-1) + " downto 0) of "+std_logic(_param._nb_entity-1));20 vhdl->set_type ("Ttable", "array (" + toString(_param->_size_table-1) + " downto 0) of "+std_logic(_param->_nb_entity-1)); 21 21 22 22 23 23 vhdl->set_signal ("reg_TABLE", "Ttable"); 24 for (uint32_t i=0; i<_param ._nb_access; i++)24 for (uint32_t i=0; i<_param->_nb_access; i++) 25 25 { 26 vhdl->set_signal ("access_entry_"+toString(i)+" ",std_logic(_param ._nb_entity-1));27 vhdl->set_signal ("access_next_entry_"+toString(i)+"",std_logic(_param ._nb_entity-1));28 vhdl->set_signal ("access_entity_"+toString(i)+" ",std_logic(static_cast<uint32_t>(log2(_param ._nb_entity))));26 vhdl->set_signal ("access_entry_"+toString(i)+" ",std_logic(_param->_nb_entity-1)); 27 vhdl->set_signal ("access_next_entry_"+toString(i)+"",std_logic(_param->_nb_entity-1)); 28 vhdl->set_signal ("access_entity_"+toString(i)+" ",std_logic(static_cast<uint32_t>(log2(_param->_nb_entity)))); 29 29 } 30 30 31 for (uint32_t i=0; i<_param ._nb_update; i++)31 for (uint32_t i=0; i<_param->_nb_update; i++) 32 32 { 33 vhdl->set_signal ("update_next_entry_"+toString(i)+"",std_logic(_param ._nb_entity-1));33 vhdl->set_signal ("update_next_entry_"+toString(i)+"",std_logic(_param->_nb_entity-1)); 34 34 } 35 35 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Common
r62 r78 29 29 30 30 FLAGS_COMMON = $(SYSTEMC_CFLAGS_$(SIMULATOR)) \ 31 -O3 \ 32 -g3 \ 33 -Wall \ 34 -Wunused 31 $(CXX_FLAGS) 35 32 36 33 # -Wno-deprecated \ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest
r71 r78 72 72 PERIOD[0]=1; \ 73 73 \ 74 while $(READ)line; do \74 while read line; do \ 75 75 LINE=($$line); \ 76 76 \ … … 117 117 export SYSTEMC=$(SYSTEMC_$(SIMULATOR)) ; ./$(DIR_BIN)/$(EXEC).x $(EXEC_PARAMS) $* `$(CAT) $<` &> $@ 118 118 declare -i count=`$(GREP) -ch "Test OK" $@`; \ 119 declare timing=`$(GREP) -h "Timing" $@`; \ 119 120 if $(TEST) $$count -ne 0; \ 120 then echo " $* ... OK";\121 else echo " $* ... KO"; exit 1; \121 then echo -e " $* ... OK\t$$timing";\ 122 else echo " $* ... KO"; exit 1; \ 122 123 fi; 123 124 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Synthesis
r68 r78 54 54 $(ECHO) -e "" >> $(FPGA_CFG_FILE_LOCAL); \ 55 55 done; \ 56 ($(XILINX_ENV); $(CD)$(FPGA_CFG_FILE_GLOBAL_DIR); $(FPGA_CFG_FILE_GLOBAL)); \56 ($(XILINX_ENV); cd $(FPGA_CFG_FILE_GLOBAL_DIR); $(FPGA_CFG_FILE_GLOBAL)); \ 57 57 $(MAKE) $(FPGA_LOG_FILES); 58 58 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.deps
r77 r78 20 20 #-----[ Library ]------------------------------------------ 21 21 22 Behavioural_LIBRARY = -l Common\23 -l Behavioural22 Behavioural_LIBRARY = -lBehavioural \ 23 -lCommon 24 24 25 Behavioural_DIR_LIBRARY = -L$( Common_DIR)/lib \26 -L$( Behavioural_DIR)/lib25 Behavioural_DIR_LIBRARY = -L$(Behavioural_DIR)/lib \ 26 -L$(Common_DIR)/lib 27 27 28 28 #-----[ Rules ]-------------------------------------------- … … 30 30 Behavioural_library : 31 31 @\ 32 $(MAKE) Common_library; 32 $(MAKE) Common_library; \ 33 33 $(MAKE) --directory=$(Behavioural_DIR) --makefile=Makefile; 34 34 35 35 Behavioural_library_clean : 36 36 @\ 37 $(MAKE) Common_library_clean; 37 $(MAKE) Common_library_clean; \ 38 38 $(MAKE) --directory=$(Behavioural_DIR) --makefile=Makefile clean; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/Makefile.deps
r77 r78 30 30 @COMPONENT_library : 31 31 @\ 32 $(MAKE) Behavioural_library; 32 $(MAKE) Behavioural_library; \ 33 33 $(MAKE) --directory=$(@COMPONENT_DIR) --makefile=Makefile; 34 34 35 35 @COMPONENT_library_clean : 36 36 @\ 37 $(MAKE) Behavioural_library_clean; 37 $(MAKE) Behavioural_library_clean; \ 38 38 $(MAKE) --directory=$(@COMPONENT_DIR) --makefile=Makefile clean; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/SelfTest/src/main.cpp
r76 r78 14 14 err (_("<Usage> %s name_instance list_params.\n"),argv[0]); 15 15 err (_("list_params is :\n")); 16 err (_(" * ()\n")); 16 17 17 18 exit (1); … … 24 25 #endif 25 26 { 26 if (argc != 2+NB_PARAMS)27 if (argc != static_cast<int>(2+NB_PARAMS)) 27 28 usage (argc, argv); 28 29 29 uint32_t 30 uint32_t x = 1; 30 31 31 const string name =argv[x++];32 string name = argv[x++]; 32 33 //const uint32_t size_data = atoi(argv[x++]); 33 34 //const uint32_t nb_port = atoi(argv[x++]); 34 35 36 int _return = EXIT_SUCCESS; 35 37 try 36 38 { … … 46 48 catch (morpheo::ErrorMorpheo & error) 47 49 { 48 msg (_("<%s> : %s.\n"),name.c_str(), error.what ());49 exit (EXIT_FAILURE);50 msg (_("<%s> :\n%s"),name.c_str(), error.what ()); 51 _return = EXIT_FAILURE; 50 52 } 51 53 catch (...) 52 54 { 53 55 err (_("<%s> : This test must generate a error.\n"),name.c_str()); 54 exit (EXIT_FAILURE);56 _return = EXIT_FAILURE; 55 57 } 56 58 57 return ( EXIT_SUCCESS);59 return (_return); 58 60 } 59 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/include/New_Component.h
r76 r78 16 16 #include "Common/include/ToString.h" 17 17 #include "Common/include/Debug.h" 18 #include "Behavioural/include/Types.h"19 18 19 #include "Behavioural/@DIRECTORY/include/Types.h" 20 20 #include "Behavioural/@DIRECTORY/include/Parameters.h" 21 21 #ifdef STATISTICS … … 53 53 #ifdef SYSTEMC 54 54 // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 55 // Interface55 // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 56 56 public : SC_CLOCK * in_CLOCK ; 57 57 public : SC_IN (Tcontrol_t) * in_NRESET ; … … 105 105 106 106 #ifdef STATISTICS 107 public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); 107 public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); 108 public : void statistics_deallocation (void); 108 109 #endif 109 110 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/include/Parameters.h
r77 r78 22 22 //-----[ methods ]----------------------------------------------------------- 23 23 public : Parameters (); 24 public : Parameters (Parameters & param) ;24 // public : Parameters (Parameters & param) ; 25 25 public : ~Parameters () ; 26 26 27 public : std::stringmsg_error (void);27 public : Parameters_test msg_error (void); 28 28 29 public : std::string print (uint32_t depth);30 public : friend std::ostream& operator<< (std::ostream& output_stream,29 public : std::string print (uint32_t depth); 30 public : friend std::ostream& operator<< (std::ostream& output_stream, 31 31 morpheo::behavioural::@NAMESPACE_USE::Parameters & x); 32 32 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component.cpp
r76 r78 46 46 log_printf(INFO,@COMPONENT,FUNCTION,"Allocation of statistics"); 47 47 48 statistics_ declaration(param_statistics);48 statistics_allocation(param_statistics); 49 49 } 50 50 #endif … … 87 87 if (_usage & USE_STATISTICS) 88 88 { 89 log_printf(INFO,@COMPONENT,FUNCTION,"Generate Statistics file"); 90 91 delete _stat; 89 statistics_deallocation(); 92 90 } 93 91 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_allocation.cpp
r76 r78 37 37 _interfaces = entity->set_interfaces(); 38 38 39 // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~40 39 // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 40 { 41 41 Interface * interface = _interfaces->set_interface("" 42 42 #ifdef POSITION … … 46 46 #endif 47 47 ); 48 49 in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES);50 in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);51 48 49 in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); 50 in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES); 51 } 52 52 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 53 53 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/New_Component_statistics_allocation.cpp
r76 r78 14 14 15 15 #undef FUNCTION 16 #define FUNCTION "@COMPONENT::statistics_ declaration"17 void @COMPONENT::statistics_ declaration (morpheo::behavioural::Parameters_Statistics * param_statistics)16 #define FUNCTION "@COMPONENT::statistics_allocation" 17 void @COMPONENT::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) 18 18 { 19 19 log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/Parameters.cpp
r53 r78 21 21 }; 22 22 23 #undef FUNCTION24 #define FUNCTION "@COMPONENT::Parameters (copy)"25 Parameters::Parameters (Parameters & param)26 {27 log_printf(FUNC,@COMPONENT,FUNCTION,"Begin");28 test();29 log_printf(FUNC,@COMPONENT,FUNCTION,"End");30 };23 // #undef FUNCTION 24 // #define FUNCTION "@COMPONENT::Parameters (copy)" 25 // Parameters::Parameters (Parameters & param) 26 // { 27 // log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); 28 // test(); 29 // log_printf(FUNC,@COMPONENT,FUNCTION,"End"); 30 // }; 31 31 32 32 #undef FUNCTION -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vbe/src/Parameters_msg_error.cpp
r76 r78 16 16 #undef FUNCTION 17 17 #define FUNCTION "@COMPONENT::msg_error" 18 std::stringParameters::msg_error(void)18 Parameters_test Parameters::msg_error(void) 19 19 { 20 20 log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); 21 21 22 std::string msg = ""; 23 24 return msg; 22 Parameters_test test ("@COMPONENT"); 25 23 26 24 log_printf(FUNC,@COMPONENT,FUNCTION,"End"); 25 26 return test; 27 27 }; 28 28 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/Makefile.deps
r77 r78 30 30 @COMPONENT_library : 31 31 @\ 32 $(MAKE) Behavioural_library; 32 $(MAKE) Behavioural_library; \ 33 33 $(MAKE) --directory=$(@COMPONENT_DIR) --makefile=Makefile; 34 34 35 35 @COMPONENT_library_clean : 36 36 @\ 37 $(MAKE) Behavioural_library_clean; 37 $(MAKE) Behavioural_library_clean; \ 38 38 $(MAKE) --directory=$(@COMPONENT_DIR) --makefile=Makefile clean; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/SelfTest/src/main.cpp
r76 r78 14 14 err (_("<Usage> %s name_instance list_params.\n"),argv[0]); 15 15 err (_("list_params is :\n")); 16 err (_(" * ()\n")); 16 17 17 18 exit (1); … … 24 25 #endif 25 26 { 26 if (argc != 2+NB_PARAMS)27 if (argc != static_cast<int>(2+NB_PARAMS)) 27 28 usage (argc, argv); 28 29 29 uint32_t 30 uint32_t x = 1; 30 31 31 const string name =argv[x++];32 string name = argv[x++]; 32 33 //const uint32_t size_data = atoi(argv[x++]); 33 34 //const uint32_t nb_port = atoi(argv[x++]); 34 35 36 int _return = EXIT_SUCCESS; 35 37 try 36 38 { … … 46 48 catch (morpheo::ErrorMorpheo & error) 47 49 { 48 msg (_("<%s> : %s.\n"),name.c_str(), error.what ());49 exit (EXIT_FAILURE);50 msg (_("<%s> :\n%s"),name.c_str(), error.what ()); 51 _return = EXIT_FAILURE; 50 52 } 51 53 catch (...) 52 54 { 53 55 err (_("<%s> : This test must generate a error.\n"),name.c_str()); 54 exit (EXIT_FAILURE);56 _return = EXIT_FAILURE; 55 57 } 56 58 57 return ( EXIT_SUCCESS);59 return (_return); 58 60 } 59 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/include/New_Component.h
r76 r78 53 53 #ifdef SYSTEMC 54 54 // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 55 // Interface55 // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 56 56 public : SC_CLOCK * in_CLOCK ; 57 57 public : SC_IN (Tcontrol_t) * in_NRESET ; … … 104 104 105 105 #ifdef STATISTICS 106 public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); 106 public : void statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics); 107 public : void statistics_deallocation (void); 107 108 #endif 108 109 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/include/Parameters.h
r77 r78 22 22 //-----[ methods ]----------------------------------------------------------- 23 23 public : Parameters (); 24 public : Parameters (Parameters & param) ;24 // public : Parameters (Parameters & param) ; 25 25 public : ~Parameters () ; 26 26 27 public : std::stringmsg_error (void);27 public : Parameters_test msg_error (void); 28 28 29 public : std::string print (uint32_t depth);30 public : friend std::ostream& operator<< (std::ostream& output_stream,29 public : std::string print (uint32_t depth); 30 public : friend std::ostream& operator<< (std::ostream& output_stream, 31 31 morpheo::behavioural::@NAMESPACE_USE::Parameters & x); 32 32 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component.cpp
r76 r78 46 46 log_printf(INFO,@COMPONENT,FUNCTION,"Allocation of statistics"); 47 47 48 statistics_ declaration(param_statistics);48 statistics_allocation(param_statistics); 49 49 } 50 50 #endif … … 87 87 if (_usage & USE_STATISTICS) 88 88 { 89 log_printf(INFO,@COMPONENT,FUNCTION,"Generate Statistics file"); 90 91 delete _stat; 89 statistics_deallocation(); 92 90 } 93 91 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_allocation.cpp
r76 r78 36 36 37 37 _interfaces = entity->set_interfaces(); 38 39 // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~40 38 39 // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 40 { 41 41 Interface * interface = _interfaces->set_interface("" 42 42 #ifdef POSITION … … 46 46 #endif 47 47 ); 48 49 in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); 50 in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES); 51 } 52 53 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 54 55 // ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 56 std::string src,dest; 48 57 49 in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES);50 in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);51 58 52 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 59 // ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 60 _component->test_map(); 53 61 54 62 #ifdef POSITION -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/New_Component_statistics_allocation.cpp
r76 r78 14 14 15 15 #undef FUNCTION 16 #define FUNCTION "@COMPONENT::statistics_ declaration"17 void @COMPONENT::statistics_ declaration (morpheo::behavioural::Parameters_Statistics * param_statistics)16 #define FUNCTION "@COMPONENT::statistics_allocation" 17 void @COMPONENT::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics) 18 18 { 19 19 log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/Parameters.cpp
r76 r78 21 21 }; 22 22 23 #undef FUNCTION24 #define FUNCTION "@COMPONENT::Parameters (copy)"25 Parameters::Parameters (Parameters & param)26 {27 log_printf(FUNC,@COMPONENT,FUNCTION,"Begin");28 test();29 log_printf(FUNC,@COMPONENT,FUNCTION,"End");30 };23 // #undef FUNCTION 24 // #define FUNCTION "@COMPONENT::Parameters (copy)" 25 // Parameters::Parameters (Parameters & param) 26 // { 27 // log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); 28 // test(); 29 // log_printf(FUNC,@COMPONENT,FUNCTION,"End"); 30 // }; 31 31 32 32 #undef FUNCTION -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component_vst/src/Parameters_msg_error.cpp
r76 r78 16 16 #undef FUNCTION 17 17 #define FUNCTION "@COMPONENT::msg_error" 18 std::stringParameters::msg_error(void)18 Parameters_test Parameters::msg_error(void) 19 19 { 20 20 log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); 21 21 22 std::string msg = ""; 23 24 return msg; 22 Parameters_test test ("@COMPONENT"); 25 23 26 24 log_printf(FUNC,@COMPONENT,FUNCTION,"End"); 25 26 return test; 27 27 }; 28 28 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h
r76 r78 7 7 // -----[ NO ITERATION ]------------------------------------------------- 8 8 // ---------------------------------------------------------------------- 9 10 #define __ALLOC_SIGNAL(sig, name, type) \ 11 { \ 12 sig = new type (name); \ 13 } 9 14 10 15 #ifdef POSITION … … 16 21 #endif 17 22 18 #define ALLOC_VAL ACK_IN( sig, name, type) \23 #define ALLOC_VAL_ACK_IN( sig, name, type) \ 19 24 { \ 20 25 sig = interface->set_signal_valack_in (name, type); \ 21 26 } 22 #define ALLOC_VAL ACK_OUT( sig, name, type) \27 #define ALLOC_VAL_ACK_OUT( sig, name, type) \ 23 28 { \ 24 29 sig = interface->set_signal_valack_out(name, type); \ 25 30 } 26 #define ALLOC_VAL _IN( sig)\27 { \ 28 sig = interface->set_signal_valack_in ( VAL); \31 #define ALLOC_VALACK_IN( sig, type) \ 32 { \ 33 sig = interface->set_signal_valack_in (type); \ 29 34 } 30 #define ALLOC_VAL_OUT( sig) \ 31 { \ 32 sig = interface->set_signal_valack_out(VAL); \ 33 } 34 #define ALLOC_ACK_IN( sig) \ 35 { \ 36 sig = interface->set_signal_valack_in (ACK); \ 37 } 38 #define ALLOC_ACK_OUT( sig) \ 39 { \ 40 sig = interface->set_signal_valack_out(ACK); \ 35 #define ALLOC_VALACK_OUT( sig, type) \ 36 { \ 37 sig = interface->set_signal_valack_out(type); \ 41 38 } 42 39 #define ALLOC_SIGNAL_IN( sig, name, type, size) \ … … 60 57 // -----[ ITERATION 1 ]-------------------------------------------------- 61 58 // ---------------------------------------------------------------------- 59 60 #define __ALLOC1_INTERFACE(name, it1) \ 61 const std::string interface_name = name; \ 62 const uint32_t iterator_1 = it1; 63 64 #define __ALLOC1_SIGNAL_IN( sig, name, type) \ 65 { \ 66 sig = new SC_IN(type) * [iterator_1]; \ 67 std::string separator="_"; \ 68 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<iterator_1; alloc_signal_it1++) \ 69 { \ 70 std::string str = "in_"+interface_name+separator+toString(alloc_signal_it1)+separator+name; \ 71 sig [alloc_signal_it1] = new SC_IN(type) (str.c_str()); \ 72 } \ 73 } 74 75 #define __ALLOC1_SIGNAL_OUT( sig, name, type) \ 76 { \ 77 sig = new SC_OUT(type) * [iterator_1]; \ 78 std::string separator="_"; \ 79 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<iterator_1; alloc_signal_it1++) \ 80 { \ 81 std::string str = "out_"+interface_name+separator+toString(alloc_signal_it1)+separator+name; \ 82 sig [alloc_signal_it1] = new SC_OUT(type) (str.c_str()); \ 83 } \ 84 } 62 85 63 86 #ifdef POSITION … … 66 89 Interface_fifo * interface [iterator_1]; \ 67 90 { \ 68 std::string separator="_";\69 for (uint32_t i=0; i<iterator_1; i++)\70 { \ 71 interface [ i] = _interfaces->set_interface( name+separator+toString(i), direction, localisation, str); \91 std::string separator="_"; \ 92 for (uint32_t alloc_interface_it1=0; alloc_interface_it1<iterator_1; alloc_interface_it1++) \ 93 { \ 94 interface [alloc_interface_it1] = _interfaces->set_interface( name+separator+toString(alloc_interface_it1), direction, localisation, str); \ 72 95 } \ 73 96 } … … 77 100 Interface_fifo * interface [iterator_1]; \ 78 101 { \ 79 std::string separator="_";\80 for (uint32_t i=0; i<iterator_1; i++)\81 { \ 82 interface [ i] = _interfaces->set_interface( name+separator+toString(i)); \102 std::string separator="_"; \ 103 for (uint32_t alloc_interface_it1=0; alloc_interface_it1<iterator_1; alloc_interface_it1++) \ 104 { \ 105 interface [alloc_interface_it1] = _interfaces->set_interface( name+separator+toString(alloc_interface_it1)); \ 83 106 } \ 84 107 } 85 108 #endif 86 109 87 88 #define ALLOC1_VALACK_IN( sig, name, type) \ 110 #define ALLOC1_VAL_ACK_IN( sig, name, type) \ 89 111 { \ 90 112 sig = new SC_IN (Tcontrol_t) * [iterator_1]; \ 91 for (uint32_t i=0; i<iterator_1; i++)\92 { \ 93 sig [ i] = interface[i]->set_signal_valack_in (name, type);\94 } \ 95 } 96 #define ALLOC1_VAL ACK_OUT(sig, name, type) \113 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<iterator_1; alloc_signal_it1++) \ 114 { \ 115 sig [alloc_signal_it1] = interface[alloc_signal_it1]->set_signal_valack_in (name, type); \ 116 } \ 117 } 118 #define ALLOC1_VAL_ACK_OUT(sig, name, type) \ 97 119 { \ 98 120 sig = new SC_OUT(Tcontrol_t) * [iterator_1]; \ 99 for (uint32_t i=0; i<iterator_1; i++)\100 { \ 101 sig [ i] = interface[i]->set_signal_valack_out(name, type);\102 } \ 103 } 104 #define ALLOC1_VAL _IN( sig)\121 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<iterator_1; alloc_signal_it1++) \ 122 { \ 123 sig [alloc_signal_it1] = interface[alloc_signal_it1]->set_signal_valack_out(name, type); \ 124 } \ 125 } 126 #define ALLOC1_VALACK_IN( sig, type) \ 105 127 { \ 106 128 sig = new SC_IN (Tcontrol_t) * [iterator_1]; \ 107 for (uint32_t i=0; i<iterator_1; i++)\108 { \ 109 sig [ i] = interface[i]->set_signal_valack_in (VAL);\110 } \ 111 } 112 #define ALLOC1_VAL _OUT( sig)\129 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<iterator_1; alloc_signal_it1++) \ 130 { \ 131 sig [alloc_signal_it1] = interface[alloc_signal_it1]->set_signal_valack_in (type); \ 132 } \ 133 } 134 #define ALLOC1_VALACK_OUT( sig, type) \ 113 135 { \ 114 136 sig = new SC_OUT(Tcontrol_t) * [iterator_1]; \ 115 for (uint32_t i=0; i<iterator_1; i++) \ 116 { \ 117 sig [i] = interface[i]->set_signal_valack_out(VAL); \ 118 } \ 119 } 120 #define ALLOC1_ACK_IN( sig) \ 121 { \ 122 sig = new SC_IN (Tcontrol_t) * [iterator_1]; \ 123 for (uint32_t i=0; i<iterator_1; i++) \ 124 { \ 125 sig [i] = interface[i]->set_signal_valack_in (ACK); \ 126 } \ 127 } 128 #define ALLOC1_ACK_OUT( sig) \ 129 { \ 130 sig = new SC_OUT(Tcontrol_t) * [iterator_1]; \ 131 for (uint32_t i=0; i<iterator_1; i++) \ 132 { \ 133 sig [i] = interface[i]->set_signal_valack_out(ACK); \ 137 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<iterator_1; alloc_signal_it1++) \ 138 { \ 139 sig [alloc_signal_it1] = interface[alloc_signal_it1]->set_signal_valack_out(type); \ 134 140 } \ 135 141 } … … 138 144 { \ 139 145 sig = new SC_IN (type) * [iterator_1]; \ 140 for (uint32_t i=0; i<iterator_1; i++)\146 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<iterator_1; alloc_signal_it1++) \ 141 147 { \ 142 sig [ i] = interface[i]->set_signal_in <type> (name, size);\148 sig [alloc_signal_it1] = interface[alloc_signal_it1]->set_signal_in <type> (name, size); \ 143 149 } \ 144 150 } … … 148 154 { \ 149 155 sig = new SC_OUT(type) * [iterator_1]; \ 150 for (uint32_t i=0; i<iterator_1; i++)\156 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<iterator_1; alloc_signal_it1++) \ 151 157 { \ 152 sig [ i] = interface[i]->set_signal_out<type> (name, size);\158 sig [alloc_signal_it1] = interface[alloc_signal_it1]->set_signal_out<type> (name, size); \ 153 159 } \ 154 160 } … … 159 165 std::string separator="_"; \ 160 166 std::string str; \ 161 for (uint32_t i=0; i<it1; i++) \ 162 { \ 163 str = name+separator+toString(i); \ 164 sig [i] = new sc_signal<type> (str.c_str()); \ 165 } \ 166 } 167 168 #define INSTANCE1_SC_SIGNAL(component, sig, it1) \ 169 for (uint32_t i=0; i<it1; i++) \ 170 { \ 171 (*(component->sig[i])) (*(sig[i])); \ 172 } 173 167 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 168 { \ 169 str = name+separator+toString(alloc_signal_it1); \ 170 sig [alloc_signal_it1] = new sc_signal<type> (str.c_str()); \ 171 } \ 172 } 173 174 #define INSTANCE1_SC_SIGNAL(component, sig, it1) \ 175 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 176 { \ 177 (*(component->sig[alloc_signal_it1])) (*(sig[alloc_signal_it1])); \ 178 } 179 180 // ---------------------------------------------------------------------- 181 // -----[ ITERATION 2 ]-------------------------------------------------- 182 // ---------------------------------------------------------------------- 183 184 #ifdef POSITION 185 #define ALLOC2_INTERFACE( name, direction, localisation, str, it1, it2) \ 186 uint32_t iterator_1 = 0; \ 187 uint32_t iterator_2 = 0; \ 188 Interface_fifo *** interface; \ 189 { \ 190 std::string separator="_"; \ 191 iterator_1 = it1; \ 192 interface = new Interface_fifo ** [iterator_1]; \ 193 for (uint32_t alloc_interface_it1=0; alloc_interface_it1<iterator_1; alloc_interface_it1++) \ 194 { \ 195 iterator_2 = it2; \ 196 interface [alloc_interface_it1] = new Interface_fifo * [iterator_2]; \ 197 for (uint32_t alloc_interface_it2=0; alloc_interface_it2<iterator_2; alloc_interface_it2++) \ 198 { \ 199 interface [alloc_interface_it1][alloc_interface_it2] = _interfaces->set_interface( name+separator+toString(alloc_interface_it1)+separator+toString(alloc_interface_it2), direction, localisation, str); \ 200 } \ 201 } \ 202 } 203 #else 204 #define ALLOC2_INTERFACE( name, direction, localisation, str, it1, it2) \ 205 uint32_t iterator_1 = 0; \ 206 uint32_t iterator_2 = 0; \ 207 Interface_fifo *** interface; \ 208 { \ 209 std::string separator="_"; \ 210 iterator_1 = it1; \ 211 interface = new Interface_fifo ** [iterator_1]; \ 212 for (uint32_t alloc_interface_it1=0; alloc_interface_it1<iterator_1; alloc_interface_it1++) \ 213 { \ 214 iterator_2 = it2; \ 215 interface [alloc_interface_it1] = new Interface_fifo * [iterator_2]; \ 216 for (uint32_t alloc_interface_it2=0; alloc_interface_it2<iterator_2; alloc_interface_it2++) \ 217 { \ 218 interface [alloc_interface_it1][alloc_interface_it2] = _interfaces->set_interface( name+separator+toString(alloc_interface_it1)+separator+toString(alloc_interface_it2)); \ 219 } \ 220 } \ 221 } 174 222 #endif 223 224 #define _ALLOC2_VAL_ACK_IN( sig, name, type, it1, it2) \ 225 { \ 226 sig = new SC_IN (Tcontrol_t) ** [it1]; \ 227 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 228 { \ 229 sig [alloc_signal_it1] = new SC_IN (Tcontrol_t) * [it2]; \ 230 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++) \ 231 { \ 232 sig [alloc_signal_it1][alloc_signal_it2] = interface[alloc_signal_it1][alloc_signal_it2]->set_signal_valack_in (name, type); \ 233 } \ 234 } \ 235 } 236 237 #define _ALLOC2_VAL_ACK_OUT( sig, name, type, it1, it2) \ 238 { \ 239 sig = new SC_OUT (Tcontrol_t) ** [it1]; \ 240 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 241 { \ 242 sig [alloc_signal_it1] = new SC_OUT (Tcontrol_t) * [it2]; \ 243 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++) \ 244 { \ 245 sig [alloc_signal_it1][alloc_signal_it2] = interface[alloc_signal_it1][alloc_signal_it2]->set_signal_valack_out (name, type); \ 246 } \ 247 } \ 248 } 249 250 #define _ALLOC2_VALACK_IN( sig,type, it1, it2) \ 251 { \ 252 sig = new SC_IN (Tcontrol_t) ** [it1]; \ 253 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 254 { \ 255 sig [alloc_signal_it1] = new SC_IN (Tcontrol_t) * [it2]; \ 256 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++) \ 257 { \ 258 sig [alloc_signal_it1][alloc_signal_it2] = interface[alloc_signal_it1][alloc_signal_it2]->set_signal_valack_in (type); \ 259 } \ 260 } \ 261 } 262 263 #define _ALLOC2_VALACK_OUT( sig,type, it1, it2) \ 264 { \ 265 sig = new SC_OUT (Tcontrol_t) ** [it1]; \ 266 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 267 { \ 268 sig [alloc_signal_it1] = new SC_OUT (Tcontrol_t) * [it2]; \ 269 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++) \ 270 { \ 271 sig [alloc_signal_it1][alloc_signal_it2] = interface[alloc_signal_it1][alloc_signal_it2]->set_signal_valack_out (type); \ 272 } \ 273 } \ 274 } 275 276 #define _ALLOC2_SIGNAL_IN( sig, name, type, size, it1, it2) \ 277 if (size > 0) \ 278 { \ 279 sig = new SC_IN (type) ** [it1]; \ 280 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 281 { \ 282 sig [alloc_signal_it1] = new SC_IN (type) * [it2]; \ 283 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++) \ 284 { \ 285 sig [alloc_signal_it1][alloc_signal_it2] = interface[alloc_signal_it1][alloc_signal_it2]->set_signal_in <type> (name, size); \ 286 } \ 287 } \ 288 } 289 290 #define _ALLOC2_SIGNAL_OUT( sig, name, type, size, it1, it2) \ 291 if (size > 0) \ 292 { \ 293 sig = new SC_OUT (type) ** [it1]; \ 294 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 295 { \ 296 sig [alloc_signal_it1] = new SC_OUT (type) * [it2]; \ 297 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++) \ 298 { \ 299 sig [alloc_signal_it1][alloc_signal_it2] = interface[alloc_signal_it1][alloc_signal_it2]->set_signal_out <type> (name, size); \ 300 } \ 301 } \ 302 } 303 304 #define ALLOC2_VAL_ACK_IN( sig, name, type ) _ALLOC2_VAL_ACK_IN( sig, name, type , iterator_1, iterator_2) 305 #define ALLOC2_VAL_ACK_OUT(sig, name, type ) _ALLOC2_VAL_ACK_OUT(sig, name, type , iterator_1, iterator_2) 306 #define ALLOC2_VALACK_IN( sig, type ) _ALLOC2_VALACK_IN( sig, type , iterator_1, iterator_2) 307 #define ALLOC2_VALACK_OUT( sig, type ) _ALLOC2_VALACK_OUT( sig, type , iterator_1, iterator_2) 308 #define ALLOC2_SIGNAL_IN( sig, name, type, size) _ALLOC2_SIGNAL_IN( sig, name, type, size, iterator_1, iterator_2) 309 #define ALLOC2_SIGNAL_OUT( sig, name, type, size) _ALLOC2_SIGNAL_OUT( sig, name, type, size, iterator_1, iterator_2) 310 311 #define ALLOC2_SC_SIGNAL( sig, name, type, it1, it2) \ 312 sc_signal<type> *** sig = new sc_signal<type> ** [it1]; \ 313 { \ 314 std::string separator="_"; \ 315 std::string str; \ 316 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 317 { \ 318 sig [alloc_signal_it1] = new sc_signal<type> * [it2]; \ 319 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++) \ 320 { \ 321 str = name+separator+toString(alloc_signal_it1)+separator+toString(alloc_signal_it2); \ 322 sig [alloc_signal_it1][alloc_signal_it2] = new sc_signal<type> (str.c_str()); \ 323 } \ 324 } \ 325 } 326 327 #define INSTANCE2_SC_SIGNAL(component, sig, it1, it2) \ 328 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 329 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++) \ 330 { \ 331 (*(component->sig[alloc_signal_it1][alloc_signal_it2])) (*(sig[alloc_signal_it1][alloc_signal_it2])); \ 332 } 333 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Component.h
r75 r78 25 25 namespace behavioural { 26 26 27 #ifdef DEBUG 28 # define PORT_MAP(x,a,b,c,d) \ 29 do \ 30 { \ 31 try \ 32 { \ 33 x->port_map(a,b,c,d); \ 34 } \ 35 catch (morpheo::ErrorMorpheo & error) \ 36 { \ 37 throw (ErrorMorpheo ("In file "+toString(__FILE__)+", at line "+toString(__LINE__)+"\n"+error.what ())); \ 38 } \ 39 } \ 40 while (0) 41 #else 42 # define PORT_MAP(x,a,b,c,d) \ 43 do \ 44 { \ 45 x->port_map(a,b,c,d); \ 46 } \ 47 while (0) 48 #endif 49 50 #define COMPONENT_MAP(x,a,b,c,d) \ 51 do \ 52 { \ 53 PORT_MAP(x,a,b,c,d); \ 54 PORT_MAP(x,c,d,a,b); \ 55 } \ 56 while (0) 57 58 27 59 typedef uint8_t Tinstance_t; 28 60 … … 35 67 typedef struct 36 68 { 37 public : Tinstance_t _instance; 38 public : Entity * _entity ; 69 //public : Component * _component; 70 public : Entity * _entity ; 71 public : Tinstance_t _instance ; 39 72 } Tcomponent_t; 40 73 … … 42 75 { 43 76 // -----[ fields ]---------------------------------------------------- 44 private : const Tusage_t _usage;45 private : Entity * _entity ;77 private : const Tusage_t _usage; 78 private : Entity * _entity ; 46 79 private : std::list<Tcomponent_t*> * _list_component; 47 80 … … 57 90 #endif 58 91 ); 59 private : std::string 92 private : std::string get_entity (void); 60 93 61 94 public : void set_component (Component * component … … 69 102 ); 70 103 71 private : std::string 104 private : std::string get_component (void); 72 105 73 106 private : Entity * find_entity (std::string name); … … 87 120 std::string component_dest, 88 121 std::string port_dest ); 89 public : void port_map (std::string component_src ,90 std::string port_src );91 122 92 public : bool test_map (void); 123 public : bool test_map (bool recursive=true); 124 private : bool test_map (uint32_t depth, bool recursive); 93 125 94 126 #ifdef POSITION … … 102 134 public : void generate_file (void); 103 135 #endif 104 public : friend std::ostream& 105 136 public : friend std::ostream& operator<< (std::ostream& output_stream, 137 morpheo::behavioural::Component & x); 106 138 }; 107 139 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h
r77 r78 161 161 # define OPERATION_FIND_L_FL1 0x2 // 000_0000 l.fl1 162 162 163 # define OPERATION_SPECIAL_L_MFSPR 0x1 // 000_0000 l.mfspr 164 # define OPERATION_SPECIAL_L_MTSPR 0x2 // 000_0000 l.mtspr 165 # define OPERATION_SPECIAL_L_MAC 0x4 // 000_0000 l.mac , l.maci 166 # define OPERATION_SPECIAL_L_MACRC 0x8 // 000_0000 l.macrc 167 # define OPERATION_SPECIAL_L_MSB 0x10 // 000_0000 l.msb 168 169 # define OPERATION_BRANCH_L_TEST_NF 0x1 // 000_0000 l.bnf 170 # define OPERATION_BRANCH_L_TEST_F 0x2 // 000_0000 l.bf 171 # define OPERATION_BRANCH_L_JALR 0x4 // 000_0000 l.jal , l.jalr , l.jr 163 # define OPERATION_SPECIAL_L_NOP 0xff // 000_0000 l.nop 164 # define OPERATION_SPECIAL_L_MFSPR 0x1 // 000_0001 l.mfspr 165 # define OPERATION_SPECIAL_L_MTSPR 0x2 // 000_0010 l.mtspr 166 # define OPERATION_SPECIAL_L_RFE 0x4 // 000_0100 l.rfe 167 # define OPERATION_SPECIAL_L_MAC 0x11 // 001_0001 l.mac , l.maci 168 # define OPERATION_SPECIAL_L_MACRC 0x12 // 001_0010 l.macrc 169 # define OPERATION_SPECIAL_L_MSB 0x14 // 001_0100 l.msb 170 # define OPERATION_SPECIAL_L_MSYNC 0x21 // 010_0001 l.msync 171 # define OPERATION_SPECIAL_L_PSYNC 0x22 // 010_0010 l.psync 172 # define OPERATION_SPECIAL_L_CSYNC 0x24 // 010_0100 l.csync 173 # define OPERATION_SPECIAL_L_SYS 0x41 // 100_0001 l.sys 174 # define OPERATION_SPECIAL_L_TRAP 0x42 // 100_0010 l.trap 175 176 177 # define OPERATION_BRANCH_NONE 0x1 // 000_0000 l.j 178 # define OPERATION_BRANCH_L_TEST_NF 0x2 // 000_0000 l.bnf 179 # define OPERATION_BRANCH_L_TEST_F 0x4 // 000_0000 l.bf 180 # define OPERATION_BRANCH_L_JALR 0x8 // 000_0000 l.jal , l.jalr , l.jr 172 181 173 182 //-------------------------------------------------------[ Custom ]----- … … 195 204 196 205 # define SIZE_EXCEPTION 5 206 # define SIZE_EXCEPTION_USE 4 207 # define SIZE_EXCEPTION_MEMORY 3 208 # define SIZE_EXCEPTION_CUSTOM 3 209 # define SIZE_EXCEPTION_ALU 2 210 # define SIZE_EXCEPTION_DECOD 2 211 # define SIZE_EXCEPTION_IFETCH 2 197 212 198 213 # define EXCEPTION_NONE 0x00 // none exception … … 229 244 # define EXCEPTION_CUSTOM_6 0x1f // Reserved for custom exceptions 230 245 246 231 247 #define exception_to_address(x) (x<<8) 232 248 … … 253 269 # define EXCEPTION_ALU_SPR_ACCESS_INVALID 0x2 // SPR present in ALU but not compatible privilege 254 270 # define EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE 0x3 // SPR not present in ALU 271 272 # define EXCEPTION_DECOD_NONE 0x0 // none exception 273 # define EXCEPTION_DECOD_ILLEGAL_INSTRUCTION 0x1 // Instruction is illegal (no implemented) 274 # define EXCEPTION_DECOD_SYSCALL 0x2 // System Call 275 //#define EXCEPTION_DECOD_TRAP 0x4 // L.trap or debug unit (note : must read SR !) 276 277 # define EXCEPTION_IFETCH_NONE 0x0 // Fetch Unit generate none exception 278 # define EXCEPTION_IFETCH_INSTRUCTION_TLB 0x1 // ITLB miss 279 # define EXCEPTION_IFETCH_INSTRUCTION_PAGE 0x2 // No matching or page violation protection in pages tables 280 # define EXCEPTION_IFETCH_BUS_ERROR 0x3 // Access at a invalid physical address 281 282 # define EXCEPTION_USE_NONE 0x0 // 283 # define EXCEPTION_USE_ILLEGAL_INSTRUCTION 0x1 // illegal_instruction 284 # define EXCEPTION_USE_RANGE 0x2 // range 285 # define EXCEPTION_USE_MEMORY_WITH_ALIGNMENT 0x3 // TLB miss, page fault, bus error, alignment 286 # define EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT 0x4 // TLB miss, page fault, bus error 287 # define EXCEPTION_USE_SYSCALL 0x5 // syscall 288 # define EXCEPTION_USE_TRAP 0x6 // trap 289 # define EXCEPTION_USE_CUSTOM_0 0x7 // 290 # define EXCEPTION_USE_CUSTOM_1 0x8 // 291 # define EXCEPTION_USE_CUSTOM_2 0x9 // 292 # define EXCEPTION_USE_CUSTOM_3 0xa // 293 # define EXCEPTION_USE_CUSTOM_4 0xb // 294 # define EXCEPTION_USE_CUSTOM_5 0xc // 295 # define EXCEPTION_USE_CUSTOM_6 0xd // 296 297 //=======================================================[ icache ]===== 298 299 //--------------------------------------------------[ icache_type ]----- 300 301 # define SIZE_ICACHE_TYPE 2 302 303 # define ICACHE_TYPE_LOAD 0x0 // 0000 304 # define ICACHE_TYPE_LOCK 0x1 // 0001 305 # define ICACHE_TYPE_INVALIDATE 0x2 // 0010 306 # define ICACHE_TYPE_PREFETCH 0x3 // 0011 307 308 // just take the 2 less significative bits. 309 #define operation_to_icache_type(x) (x&0x3) 310 311 //-------------------------------------------------[ icache_error ]----- 312 313 # define SIZE_ICACHE_ERROR 1 314 315 # define ICACHE_ERROR_NONE 0x0 316 # define ICACHE_ERROR_BUS_ERROR 0x1 255 317 256 318 //=======================================================[ dcache ]===== … … 377 439 # define SPR_MACHI 2 // MAC High 378 440 441 # define NB_SPR_LOGIC 2 442 # define LOG2_NB_SPR_LOGIC 1 443 // SPR_LOGIC[0] = F 444 // SPR_LOGIC[1] = Carry, Overflow 445 # define SPR_LOGIC_SR_F 0x0 // Status register bit F (size = 1) 446 # define SPR_LOGIC_SR_CY_OV 0x1 // Status register bit overflow and carry (size = 2) 447 379 448 //----------------------------------------------[ spr_mode_access ]----- 380 449 … … 385 454 # define SPR_ACCESS_MODE_READ_ONLY_COND 0x5 // 101 special read 386 455 456 //--------------------------------------------------------[ event ]----- 457 # define SIZE_EVENT_STATE 2 458 459 # define EVENT_STATE_NO_EVENT 0 // no event : current case 460 # define EVENT_STATE_EVENT 1 // Have a event : make necessary to manage the event 461 # define EVENT_STATE_WAITEND 2 // Wait end of manage event (restaure a good context) 462 # define EVENT_STATE_END 3 // CPU can continue 463 464 # define SIZE_EVENT_TYPE 3 465 466 # define EVENT_TYPE_NONE 0 // no event 467 # define EVENT_TYPE_MISS_SPECULATION 1 // miss of speculation (load or branch miss speculation) 468 # define EVENT_TYPE_EXCEPTION 2 // exception or interruption occure 469 # define EVENT_TYPE_BRANCH_NO_ACCURATE 3 // branch is no accurate (old speculation is a miss) 470 # define EVENT_TYPE_SPR_ACCESS 4 // decod a mtspr or mfspr instruction 471 # define EVENT_TYPE_MSYNC 5 // decod a memory synchronization 472 # define EVENT_TYPE_PSYNC 6 // decod a pipeline synchronization 473 # define EVENT_TYPE_CSYNC 7 // decod a context synchronization 474 475 //-------------------------------------------------[ branch_state ]----- 476 # define SIZE_BRANCH_STATE 2 477 478 # define BRANCH_STATE_NONE 0x0 // 0 0 479 # define BRANCH_STATE_NSPEC_TAKE 0x1 // 0 1 -> incondionnal 480 # define BRANCH_STATE_SPEC_NTAKE 0x2 // 1 0 481 # define BRANCH_STATE_SPEC_TAKE 0x3 // 1 1 482 483 //---------------------------------------------[ branch_condition ]----- 484 485 # define SIZE_BRANCH_CONDITION 4 486 487 # define BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK 0x0 // None condition (jump) 488 # define BRANCH_CONDITION_NONE_WITH_WRITE_STACK 0x8 // None condition (jump) 489 # define BRANCH_CONDITION_FLAG_UNSET 0x2 // Branch if Flag is clear 490 # define BRANCH_CONDITION_FLAG_SET 0x3 // Branch if Flag is set 491 # define BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK 0x4 // Branch if a register is read 492 # define BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK 0xc // Branch if a register is read 493 # define BRANCH_CONDITION_READ_STACK 0xf // Branch with pop in stack pointer 494 495 //--------------------------------------------------[ instruction ]----- 496 # define NB_INSTRUCTION 213 // 92 ORBIS, 30 ORFPX (15 simple, 15 double), 91 ORVDX (38 on byte, 41 on half, 12 independant format) 497 498 enum 499 { 500 // ORBIS 501 INSTRUCTION_L_ADD, 502 INSTRUCTION_L_ADDC, 503 INSTRUCTION_L_ADDI, 504 INSTRUCTION_L_ADDIC, 505 INSTRUCTION_L_AND, 506 INSTRUCTION_L_ANDI, 507 INSTRUCTION_L_BF, 508 INSTRUCTION_L_BNF, 509 INSTRUCTION_L_CMOV, 510 INSTRUCTION_L_CSYNC, 511 INSTRUCTION_L_CUST1, 512 INSTRUCTION_L_CUST2, 513 INSTRUCTION_L_CUST3, 514 INSTRUCTION_L_CUST4, 515 INSTRUCTION_L_CUST5, 516 INSTRUCTION_L_CUST6, 517 INSTRUCTION_L_CUST7, 518 INSTRUCTION_L_CUST8, 519 INSTRUCTION_L_DIV, 520 INSTRUCTION_L_DIVU, 521 INSTRUCTION_L_EXTBS, 522 INSTRUCTION_L_EXTBZ, 523 INSTRUCTION_L_EXTHS, 524 INSTRUCTION_L_EXTHZ, 525 INSTRUCTION_L_EXTWS, 526 INSTRUCTION_L_EXTWZ, 527 INSTRUCTION_L_FF1, 528 INSTRUCTION_L_FL1, 529 INSTRUCTION_L_J, 530 INSTRUCTION_L_JAL, 531 INSTRUCTION_L_JALR, 532 INSTRUCTION_L_JR, 533 INSTRUCTION_L_LBS, 534 INSTRUCTION_L_LBZ, 535 INSTRUCTION_L_LD, 536 INSTRUCTION_L_LHS, 537 INSTRUCTION_L_LHZ, 538 INSTRUCTION_L_LWS, 539 INSTRUCTION_L_LWZ, 540 INSTRUCTION_L_MAC, 541 INSTRUCTION_L_MACI, 542 INSTRUCTION_L_MACRC, 543 INSTRUCTION_L_MFSPR, 544 INSTRUCTION_L_MOVHI, 545 INSTRUCTION_L_MSB, 546 INSTRUCTION_L_MSYNC, 547 INSTRUCTION_L_MTSPR, 548 INSTRUCTION_L_MUL, 549 INSTRUCTION_L_MULI, 550 INSTRUCTION_L_MULU, 551 INSTRUCTION_L_NOP, 552 INSTRUCTION_L_OR, 553 INSTRUCTION_L_ORI, 554 INSTRUCTION_L_PSYNC, 555 INSTRUCTION_L_RFE, 556 INSTRUCTION_L_ROR, 557 INSTRUCTION_L_RORI, 558 INSTRUCTION_L_SB, 559 INSTRUCTION_L_SD, 560 INSTRUCTION_L_SFEQ, 561 INSTRUCTION_L_SFEQI, 562 INSTRUCTION_L_SFGES, 563 INSTRUCTION_L_SFGESI, 564 INSTRUCTION_L_SFGEU, 565 INSTRUCTION_L_SFGEUI, 566 INSTRUCTION_L_SFGTS, 567 INSTRUCTION_L_SFGTSI, 568 INSTRUCTION_L_SFGTU, 569 INSTRUCTION_L_SFGTUI, 570 INSTRUCTION_L_SFLES, 571 INSTRUCTION_L_SFLESI, 572 INSTRUCTION_L_SFLEU, 573 INSTRUCTION_L_SFLEUI, 574 INSTRUCTION_L_SFLTS, 575 INSTRUCTION_L_SFLTSI, 576 INSTRUCTION_L_SFLTU, 577 INSTRUCTION_L_SFLTUI, 578 INSTRUCTION_L_SFNE, 579 INSTRUCTION_L_SFNEI, 580 INSTRUCTION_L_SH, 581 INSTRUCTION_L_SLL, 582 INSTRUCTION_L_SLLI, 583 INSTRUCTION_L_SRA, 584 INSTRUCTION_L_SRAI, 585 INSTRUCTION_L_SRL, 586 INSTRUCTION_L_SRLI, 587 INSTRUCTION_L_SUB, 588 INSTRUCTION_L_SW, 589 INSTRUCTION_L_SYS, 590 INSTRUCTION_L_TRAP, 591 INSTRUCTION_L_XOR, 592 INSTRUCTION_L_XORI, 593 // ORFPX 594 INSTRUCTION_LF_ADD_D, 595 INSTRUCTION_LF_ADD_S, 596 INSTRUCTION_LF_CUST1_D, 597 INSTRUCTION_LF_CUST1_S, 598 INSTRUCTION_LF_DIV_D, 599 INSTRUCTION_LF_DIV_S, 600 INSTRUCTION_LF_FTOI_D, 601 INSTRUCTION_LF_FTOI_S, 602 INSTRUCTION_LF_ITOF_D, 603 INSTRUCTION_LF_ITOF_S, 604 INSTRUCTION_LF_MADD_D, 605 INSTRUCTION_LF_MADD_S, 606 INSTRUCTION_LF_MUL_D, 607 INSTRUCTION_LF_MUL_S, 608 INSTRUCTION_LF_REM_D, 609 INSTRUCTION_LF_REM_S, 610 INSTRUCTION_LF_SFEQ_D, 611 INSTRUCTION_LF_SFEQ_S, 612 INSTRUCTION_LF_SFGE_D, 613 INSTRUCTION_LF_SFGE_S, 614 INSTRUCTION_LF_SFGT_D, 615 INSTRUCTION_LF_SFGT_S, 616 INSTRUCTION_LF_SFLE_D, 617 INSTRUCTION_LF_SFLE_S, 618 INSTRUCTION_LF_SFLT_D, 619 INSTRUCTION_LF_SFLT_S, 620 INSTRUCTION_LF_SFNE_D, 621 INSTRUCTION_LF_SFNE_S, 622 INSTRUCTION_LF_SUB_D, 623 INSTRUCTION_LF_SUB_S, 624 // ORVDX 625 INSTRUCTION_LV_ADD_B, 626 INSTRUCTION_LV_ADD_H, 627 INSTRUCTION_LV_ADDS_B, 628 INSTRUCTION_LV_ADDS_H, 629 INSTRUCTION_LV_ADDU_B, 630 INSTRUCTION_LV_ADDU_H, 631 INSTRUCTION_LV_ADDUS_B, 632 INSTRUCTION_LV_ADDUS_H, 633 INSTRUCTION_LV_ALL_EQ_B, 634 INSTRUCTION_LV_ALL_EQ_H, 635 INSTRUCTION_LV_ALL_GE_B, 636 INSTRUCTION_LV_ALL_GE_H, 637 INSTRUCTION_LV_ALL_GT_B, 638 INSTRUCTION_LV_ALL_GT_H, 639 INSTRUCTION_LV_ALL_LE_B, 640 INSTRUCTION_LV_ALL_LE_H, 641 INSTRUCTION_LV_ALL_LT_B, 642 INSTRUCTION_LV_ALL_LT_H, 643 INSTRUCTION_LV_ALL_NE_B, 644 INSTRUCTION_LV_ALL_NE_H, 645 INSTRUCTION_LV_AND, 646 INSTRUCTION_LV_ANY_EQ_B, 647 INSTRUCTION_LV_ANY_EQ_H, 648 INSTRUCTION_LV_ANY_GE_B, 649 INSTRUCTION_LV_ANY_GE_H, 650 INSTRUCTION_LV_ANY_GT_B, 651 INSTRUCTION_LV_ANY_GT_H, 652 INSTRUCTION_LV_ANY_LE_B, 653 INSTRUCTION_LV_ANY_LE_H, 654 INSTRUCTION_LV_ANY_LT_B, 655 INSTRUCTION_LV_ANY_LT_H, 656 INSTRUCTION_LV_ANY_NE_B, 657 INSTRUCTION_LV_ANY_NE_H, 658 INSTRUCTION_LV_AVG_B, 659 INSTRUCTION_LV_AVG_H, 660 INSTRUCTION_LV_CMP_EQ_B, 661 INSTRUCTION_LV_CMP_EQ_H, 662 INSTRUCTION_LV_CMP_GE_B, 663 INSTRUCTION_LV_CMP_GE_H, 664 INSTRUCTION_LV_CMP_GT_B, 665 INSTRUCTION_LV_CMP_GT_H, 666 INSTRUCTION_LV_CMP_LE_B, 667 INSTRUCTION_LV_CMP_LE_H, 668 INSTRUCTION_LV_CMP_LT_B, 669 INSTRUCTION_LV_CMP_LT_H, 670 INSTRUCTION_LV_CMP_NE_B, 671 INSTRUCTION_LV_CMP_NE_H, 672 INSTRUCTION_LV_CUST1, 673 INSTRUCTION_LV_CUST2, 674 INSTRUCTION_LV_CUST3, 675 INSTRUCTION_LV_CUST4, 676 INSTRUCTION_LV_MADDS_H, 677 INSTRUCTION_LV_MAX_B, 678 INSTRUCTION_LV_MAX_H, 679 INSTRUCTION_LV_MERGE_B, 680 INSTRUCTION_LV_MERGE_H, 681 INSTRUCTION_LV_MIN_B, 682 INSTRUCTION_LV_MIN_H, 683 INSTRUCTION_LV_MSUBS_H, 684 INSTRUCTION_LV_MULS_H, 685 INSTRUCTION_LV_NAND, 686 INSTRUCTION_LV_NOR, 687 INSTRUCTION_LV_OR, 688 INSTRUCTION_LV_PACK_B, 689 INSTRUCTION_LV_PACK_H, 690 INSTRUCTION_LV_PACKS_B, 691 INSTRUCTION_LV_PACKS_H, 692 INSTRUCTION_LV_PACKUS_B, 693 INSTRUCTION_LV_PACKUS_H, 694 INSTRUCTION_LV_PERM_N, 695 INSTRUCTION_LV_RL_B, 696 INSTRUCTION_LV_RL_H, 697 INSTRUCTION_LV_SLL, 698 INSTRUCTION_LV_SLL_B, 699 INSTRUCTION_LV_SLL_H, 700 INSTRUCTION_LV_SRA_B, 701 INSTRUCTION_LV_SRA_H, 702 INSTRUCTION_LV_SRL, 703 INSTRUCTION_LV_SRL_B, 704 INSTRUCTION_LV_SRL_H, 705 INSTRUCTION_LV_SUB_B, 706 INSTRUCTION_LV_SUB_H, 707 INSTRUCTION_LV_SUBS_B, 708 INSTRUCTION_LV_SUBS_H, 709 INSTRUCTION_LV_SUBU_B, 710 INSTRUCTION_LV_SUBU_H, 711 INSTRUCTION_LV_SUBUS_B, 712 INSTRUCTION_LV_SUBUS_H, 713 INSTRUCTION_LV_UNPACK_B, 714 INSTRUCTION_LV_UNPACK_H, 715 INSTRUCTION_LV_XOR 716 }; 717 718 //-----------------------------------------------[ Code Operation ]----- 719 720 # define MAX_OPCOD_0 64 // Instructions with immediat 721 # define MAX_OPCOD_1 64 // Instruction ORFPX32/64 722 # define MAX_OPCOD_2 256 // Instruction ORVDX64 723 # define MAX_OPCOD_3 256 // Instructions Register-Register 724 # define MAX_OPCOD_4 32 // Instructions "set flag" with register 725 # define MAX_OPCOD_5 32 // Instructions "set flag" with immediat 726 # define MAX_OPCOD_6 4 // Instruction Shift/Rotate with immediat 727 # define MAX_OPCOD_7 16 // Instructions multiply with HI-LO 728 # define MAX_OPCOD_8 2 // Instructions acces at HI-LO 729 # define MAX_OPCOD_9 8 // Instructions special 730 # define MAX_OPCOD_10 4 // Instructions no operation 731 # define MAX_OPCOD_11 4 // Instruction Shift/Rotate with register 732 # define MAX_OPCOD_12 4 // Instructions extend 733 # define MAX_OPCOD_13 4 // Instructions extend (64b) 734 735 // OPCOD_0 - [31:26] Instructions with immediat 736 # define OPCOD_L_J 0x00 // 000_000 737 # define OPCOD_L_JAL 0x01 // 000_001 738 # define OPCOD_L_BNF 0x03 // 000_011 739 # define OPCOD_L_BF 0x04 // 000_100 740 # define OPCOD_L_RFE 0x09 // 001_001 741 # define OPCOD_L_JR 0x11 // 010_001 742 # define OPCOD_L_JALR 0x12 // 010_010 743 # define OPCOD_L_MACI 0x13 // 010_011 744 # define OPCOD_L_CUST1 0x1c // 011_100 745 # define OPCOD_L_CUST2 0x1d // 011_101 746 # define OPCOD_L_CUST3 0x1e // 011_110 747 # define OPCOD_L_CUST4 0x1f // 011_111 748 # define OPCOD_L_CUST5 0x3c // 111_100 749 # define OPCOD_L_CUST6 0x3d // 111_101 750 # define OPCOD_L_CUST7 0x3e // 111_110 751 # define OPCOD_L_CUST8 0x3f // 111_111 752 # define OPCOD_L_LD 0x20 // 100_000 753 # define OPCOD_L_LWZ 0x21 // 100_001 754 # define OPCOD_L_LWS 0x22 // 100_010 755 # define OPCOD_L_LBZ 0x23 // 100_011 756 # define OPCOD_L_LBS 0x24 // 100_100 757 # define OPCOD_L_LHZ 0x25 // 100_101 758 # define OPCOD_L_LHS 0x26 // 100_110 759 # define OPCOD_L_ADDI 0x27 // 100_111 760 # define OPCOD_L_ADDIC 0x28 // 101_000 761 # define OPCOD_L_ANDI 0x29 // 101_001 762 # define OPCOD_L_ORI 0x2a // 101_010 763 # define OPCOD_L_XORI 0x2b // 101_011 764 # define OPCOD_L_MULI 0x2c // 101_100 765 # define OPCOD_L_MFSPR 0x2d // 101_101 766 # define OPCOD_L_MTSPR 0x30 // 110_000 767 # define OPCOD_L_SD 0x34 // 110_100 768 # define OPCOD_L_SW 0x35 // 110_101 769 # define OPCOD_L_SB 0x36 // 110_110 770 # define OPCOD_L_SH 0x37 // 110_111 771 772 # define OPCOD_1 0x33 // 110_011 // Instruction ORFPX32/64 773 # define OPCOD_2 0x0a // 001_010 // Instruction ORVDX64 774 # define OPCOD_3 0x38 // 111_000 // Instructions Register-Register 775 # define OPCOD_4 0x39 // 111_001 // Instructions "set flag" with register 776 # define OPCOD_5 0x2f // 101_111 // Instructions "set flag" with immediat 777 # define OPCOD_6 0x2e // 101_110 // Instruction Shift/Rotate with immediat 778 # define OPCOD_7 0x31 // 110_001 // Instructions multiply with HI-LO 779 # define OPCOD_8 0x06 // 000_110 // Instructions acces at HI-LO 780 # define OPCOD_9 0x08 // 001_000 // Instructions special 781 # define OPCOD_10 0x05 // 000_101 // Instructions no operation 782 783 // OPCOD_3 instructions - [9:8] [3:0] Instructions Register-Register 784 # define OPCOD_L_ADD 0x00 // 00_0000 785 # define OPCOD_L_ADDC 0x01 // 00_0001 786 # define OPCOD_L_SUB 0x02 // 00_0010 787 # define OPCOD_L_AND 0x03 // 00_0011 788 # define OPCOD_L_OR 0x04 // 00_0100 789 # define OPCOD_L_XOR 0x05 // 00_0101 790 # define OPCOD_L_CMOV 0x0e // 00_1110 791 # define OPCOD_L_FF1 0x0f // 00_1111 792 # define OPCOD_L_FL1 0x1f // 01_1111 793 # define OPCOD_L_MUL 0x36 // 11_0110 794 # define OPCOD_L_DIV 0x39 // 11_1001 795 # define OPCOD_L_DIVU 0x3a // 11_1010 796 # define OPCOD_L_MULU 0x3b // 11_1011 797 798 # define OPCOD_11 0x8 // 1000 // Instruction Shift/Rotate with register 799 # define OPCOD_12 0xc // 1100 // Instructions extend 800 # define OPCOD_13 0xd // 1101 // Instructions extend (64b) 801 802 // OPCOD_4 instructions - [25:21] Instructions "set flag" with register 803 # define OPCOD_L_SFEQ 0x00 // 00000 804 # define OPCOD_L_SFNE 0x01 // 00001 805 # define OPCOD_L_SFGTU 0x02 // 00010 806 # define OPCOD_L_SFGEU 0x03 // 00011 807 # define OPCOD_L_SFLTU 0x04 // 00100 808 # define OPCOD_L_SFLEU 0x05 // 00101 809 # define OPCOD_L_SFGTS 0x0a // 01010 810 # define OPCOD_L_SFGES 0x0b // 01011 811 # define OPCOD_L_SFLTS 0x0c // 01100 812 # define OPCOD_L_SFLES 0x0d // 01101 813 814 // OPCOD_5 instructions - [25:21] Instructions "set flag" with immediat 815 # define OPCOD_L_SFEQI 0x00 // 00000 816 # define OPCOD_L_SFNEI 0x01 // 00001 817 # define OPCOD_L_SFGTUI 0x02 // 00010 818 # define OPCOD_L_SFGEUI 0x03 // 00011 819 # define OPCOD_L_SFLTUI 0x04 // 00100 820 # define OPCOD_L_SFLEUI 0x05 // 00101 821 # define OPCOD_L_SFGTSI 0x0a // 01010 822 # define OPCOD_L_SFGESI 0x0b // 01011 823 # define OPCOD_L_SFLTSI 0x0c // 01100 824 # define OPCOD_L_SFLESI 0x0d // 01101 825 826 // OPCOD_6 instructions - [7:6] Instruction Shift/Rotate with immediat 827 # define OPCOD_L_SLLI 0x0 // 00 828 # define OPCOD_L_SRLI 0x1 // 01 829 # define OPCOD_L_SRAI 0x2 // 10 830 # define OPCOD_L_RORI 0x3 // 11 831 832 // OPCOD_7 instructions - [3:0] Instructions multiply with HI-LO 833 # define OPCOD_L_MAC 0x1 // 0001 834 # define OPCOD_L_MSB 0x2 // 0010 835 836 // OPCOD_8 instructions - [17] Instructions acces at HI-LO 837 # define OPCOD_L_MOVHI 0x0 // 0 838 # define OPCOD_L_MACRC 0x1 // 1 839 840 // OPCOD_9 instructions - [25:23] Instruction special 841 # define OPCOD_L_SYS 0x0 // 000 842 # define OPCOD_L_TRAP 0x2 // 010 843 # define OPCOD_L_MSYNC 0x4 // 100 844 # define OPCOD_L_PSYNC 0x5 // 101 845 # define OPCOD_L_CSYNC 0x6 // 110 846 847 // OPCOD_10 instructions - [25:24] Instruction no operation 848 # define OPCOD_L_NOP 0x1 // 01 849 850 // OPCOD_11 instructions - [7:6] Instruction Shift/Rotate with register 851 # define OPCOD_L_SLL 0x0 // 00 852 # define OPCOD_L_SRL 0x1 // 01 853 # define OPCOD_L_SRA 0x2 // 10 854 # define OPCOD_L_ROR 0x3 // 11 855 856 // OPCOD_12 instructions - [9:6] Instructions extend 857 # define OPCOD_L_EXTHS 0x0 // 0000 858 # define OPCOD_L_EXTHZ 0x2 // 0010 859 # define OPCOD_L_EXTBS 0x1 // 0001 860 # define OPCOD_L_EXTBZ 0x3 // 0011 861 862 // OPCOD_13 instructions - [9:6] Instructions extend (64b) 863 # define OPCOD_L_EXTWS 0x0 // 0000 864 # define OPCOD_L_EXTWZ 0x1 // 0001 865 387 866 /* 388 #define _size_instruction 32389 #define _size_instruction_log2 5390 391 //----------------------------------------------------[ Operation ]-----392 // #define _nb_operation 32393 // #define _size_operation 5394 395 #define _operation_none 0x0396 #define _operation_l_adds 0x1397 #define _operation_l_addu 0x2398 #define _operation_l_subs 0x3399 #define _operation_l_and 0x4400 #define _operation_l_or 0x5401 #define _operation_l_xor 0x6402 #define _operation_l_cmove 0x7403 #define _operation_l_read_imm 0x8404 #define _operation_l_movhi 0x9405 #define _operation_l_muls 0xa406 #define _operation_l_mulu 0xb407 #define _operation_l_divs 0xc408 #define _operation_l_divu 0xd409 #define _operation_l_exts 0xe410 #define _operation_l_extz 0xf411 #define _operation_l_ff1 0x10412 #define _operation_l_fl1 0x11413 #define _operation_l_sll 0x12414 #define _operation_l_sla 0x13415 #define _operation_l_srl 0x14416 #define _operation_l_ror 0x15417 #define _operation_l_cmp_eq 0x16418 #define _operation_l_cmp_ne 0x17419 #define _operation_l_cmp_ges 0x18420 #define _operation_l_cmp_geu 0x19421 #define _operation_l_cmp_gts 0x1a422 #define _operation_l_cmp_gtu 0x1b423 #define _operation_l_cmp_les 0x1c424 #define _operation_l_cmp_leu 0x1d425 #define _operation_l_cmp_lts 0x1e426 #define _operation_l_cmp_ltu 0x1f427 867 428 868 //--------------------------------------------------[ destination ]----- … … 466 906 #define mask_CONDITION_STACK 0x8 // Branch with pop in stack pointer 467 907 468 //-------------------------------------------------[ branch_state ]-----469 #define cst_BRANCH_STATE_NONE 0x0 // 0 0470 #define cst_BRANCH_STATE_NSPEC_TAKE 0x1 // 0 1 -> incondionnal471 #define cst_BRANCH_STATE_SPEC_NTAKE 0x2 // 1 0472 #define cst_BRANCH_STATE_SPEC_TAKE 0x3 // 1 1473 908 */ 474 909 … … 620 1055 621 1056 /* 622 //----------------------------------------------------623 // Code Operation (before decode)624 //----------------------------------------------------625 626 // Codop - [31:26] Instructions with immediat627 #define OPCOD_L_J 0x00 // 000_000628 #define OPCOD_L_JAL 0x01 // 000_001629 #define OPCOD_L_BNF 0x03 // 000_011630 #define OPCOD_L_BF 0x04 // 000_100631 #define OPCOD_L_RFE 0x09 // 001_001632 #define OPCOD_L_JR 0x11 // 010_001633 #define OPCOD_L_JALR 0x12 // 010_010634 #define OPCOD_L_MACI 0x13 // 010_011635 #define OPCOD_L_CUST1 0x1c // 011_100636 #define OPCOD_L_CUST2 0x1d // 011_101637 #define OPCOD_L_CUST3 0x1e // 011_110638 #define OPCOD_L_CUST4 0x1f // 011_111639 #define OPCOD_L_CUST5 0x3c // 111_100640 #define OPCOD_L_CUST6 0x3d // 111_101641 #define OPCOD_L_CUST7 0x3e // 111_110642 #define OPCOD_L_CUST8 0x3f // 111_111643 #define OPCOD_L_LD 0x20 // 100_000644 #define OPCOD_L_LWZ 0x21 // 100_001645 #define OPCOD_L_LWS 0x22 // 100_010646 #define OPCOD_L_LBZ 0x23 // 100_011647 #define OPCOD_L_LBS 0x24 // 100_100648 #define OPCOD_L_LHZ 0x25 // 100_101649 #define OPCOD_L_LHS 0x26 // 100_110650 #define OPCOD_L_ADDI 0x27 // 100_111651 #define OPCOD_L_ADDIC 0x28 // 101_000652 #define OPCOD_L_ANDI 0x29 // 101_001653 #define OPCOD_L_ORI 0x2a // 101_010654 #define OPCOD_L_XORI 0x2b // 101_011655 #define OPCOD_L_MULI 0x2c // 101_100656 #define OPCOD_L_MFSPR 0x2d // 101_101657 #define OPCOD_L_MTSPR 0x30 // 110_000658 #define OPCOD_L_SD 0x32 // 110_010659 #define OPCOD_L_SW 0x35 // 110_101660 #define OPCOD_L_SB 0x36 // 110_110661 #define OPCOD_L_SH 0x37 // 110_111662 663 #define OPCOD_INST_LV 0x0a // 001_010 // Instruction ORVDX64664 #define OPCOD_INST_LF 0x33 // 110_011 // Instruction ORFPX32/64665 666 #define OPCOD_SPECIAL 0x38 // 111_000 // Instructions Register-Register667 #define OPCOD_SPECIAL_1 0x39 // 111_001 // Instructions "set flag" with register668 #define OPCOD_SPECIAL_2 0x2f // 101_111 // Instructions "set flag" with immediat669 #define OPCOD_SPECIAL_6 0x2e // 101_110 // Instruction Shift/Rotate with immediat670 #define OPCOD_SPECIAL_7 0x31 // 110_001 // Instructions multiply with HI-LO671 #define OPCOD_SPECIAL_8 0x06 // 000_110 // Instructions acces at HI-LO672 673 // OPCOD_SPECIAL instructions - [9:8] [3:0] Instructions Register-Register674 #define OPCOD_L_ADD 0x00 // 00_0000675 #define OPCOD_L_ADDC 0x01 // 00_0001676 #define OPCOD_L_SUB 0x02 // 00_0010677 #define OPCOD_L_AND 0x03 // 00_0011678 #define OPCOD_L_OR 0x04 // 00_0100679 #define OPCOD_L_XOR 0x05 // 00_0101680 #define OPCOD_L_CMOV 0x0e // 00_1110681 #define OPCOD_L_FF1 0x0f // 00_1111682 #define OPCOD_L_FL1 0x1f // 01_1111683 #define OPCOD_L_MUL 0x36 // 11_0110684 #define OPCOD_L_DIV 0x39 // 11_1001685 #define OPCOD_L_DIVU 0x3a // 11_1010686 #define OPCOD_L_MULU 0x3b // 11_1011687 688 #define OPCOD_SPECIAL_3 0xc // 1100 // Instructions extend689 #define OPCOD_SPECIAL_4 0xd // 1101 // Instructions extend (64b)690 #define OPCOD_SPECIAL_5 0x8 // 1000 // Instruction Shift/Rotate with register691 692 // OPCOD_SPECIAL_1 instructions - [25:21] Instructions "set flag" with register693 #define OPCOD_L_SFEQ 0x00 // 00000694 #define OPCOD_L_SFNE 0x01 // 00001695 #define OPCOD_L_SFGTU 0x02 // 00010696 #define OPCOD_L_SFGEU 0x03 // 00011697 #define OPCOD_L_SFLTU 0x04 // 00100698 #define OPCOD_L_SFLEU 0x05 // 00101699 #define OPCOD_L_SFGTS 0x0a // 01010700 #define OPCOD_L_SFGES 0x0b // 01011701 #define OPCOD_L_SFLTS 0x0c // 01100702 #define OPCOD_L_SFLES 0x0d // 01101703 704 // OPCOD_SPECIAL_2 instructions - [25:21] Instructions "set flag" with immediat705 #define OPCOD_L_SFEQI 0x00 // 00000706 #define OPCOD_L_SFNEI 0x01 // 00001707 #define OPCOD_L_SFGTUI 0x02 // 00010708 #define OPCOD_L_SFGEUI 0x03 // 00011709 #define OPCOD_L_SFLTUI 0x04 // 00100710 #define OPCOD_L_SFLEUI 0x05 // 00101711 #define OPCOD_L_SFGTSI 0x0a // 01010712 #define OPCOD_L_SFGESI 0x0b // 01011713 #define OPCOD_L_SFLTSI 0x0c // 01100714 #define OPCOD_L_SFLESI 0x0d // 01101715 716 // OPCOD_SPECIAL_3 instructions - [9:6] Instructions extend717 #define OPCOD_L_EXTHS 0x0 // 0000718 #define OPCOD_L_EXTHZ 0x2 // 0010719 #define OPCOD_L_EXTBS 0x1 // 0001720 #define OPCOD_L_EXTBZ 0x3 // 0011721 722 // OPCOD_SPECIAL_4 instructions - [9:6] Instructions extend (64b)723 #define OPCOD_L_EXTWS 0x0 // 0000724 #define OPCOD_L_EXTWZ 0x1 // 0001725 726 // OPCOD_SPECIAL_5 instructions - [7:6] Instruction Shift/Rotate with register727 #define OPCOD_L_SLL 0x0 // 00728 #define OPCOD_L_SRL 0x1 // 01729 #define OPCOD_L_SRA 0x2 // 10730 #define OPCOD_L_ROR 0x3 // 11731 732 // OPCOD_SPECIAL_6 instructions - [7:6] Instruction Shift/Rotate with immediat733 #define OPCOD_L_SLLI 0x0 // 00734 #define OPCOD_L_SRLI 0x1 // 01735 #define OPCOD_L_SRAI 0x2 // 10736 #define OPCOD_L_RORI 0x3 // 11737 738 // OPCOD_SPECIAL_7 instructions - [3:0] Instructions multiply with HI-LO739 #define OPCOD_L_MAC 0x1 // 0001740 #define OPCOD_L_MSB 0x2 // 0010741 742 // OPCOD_SPECIAL_8 instructions - [17] Instructions acces at HI-LO743 #define OPCOD_L_MOVHI 0x0 // 0744 #define OPCOD_L_MACRC 0x1 // 1745 746 // Particular case Instructions systems747 #define OPCOD_L_MSYNC 0x22000000748 #define OPCOD_L_CSYNC 0x23000000749 #define OPCOD_L_PSYNC 0x22800000750 #define OPCOD_L_NOP 0x1500751 #define OPCOD_L_SYS 0x2000752 #define OPCOD_L_TRAP 0x2100753 754 //----------------------------------------------------755 // Code Operation (after decode)756 //----------------------------------------------------757 758 typedef enum759 {760 // ##### WARNING : This opcode must be the first#####761 INST_L_NO_IMPLEMENTED , // Operation is not implemented762 763 INST_L_ADD , // L.ADD , L.ADDI , L.ADDC , L.ADDIC764 INST_L_AND , // L.AND , L.ANDI765 INST_L_OR , // L.OR , L.ORI766 INST_L_XOR , // L.XOR , L.XORI767 INST_L_CMOV , // L.CMOV768 INST_L_SUB , // L.SUB769 INST_L_FF1 , // L.FF1770 INST_L_EXTBS , // L.EXTBS771 INST_L_EXTBZ , // L.EXTBZ772 INST_L_EXTHS , // L.EXTHS773 INST_L_EXTHZ , // L.EXTHZ774 INST_L_EXTWS , // L.EXTWS775 INST_L_EXTWZ , // L.EXTWZ776 INST_L_e , //777 INST_L_f , //778 INST_L_MUL , // L.MUL , L.MULI779 INST_L_MULU , // L.MULU780 INST_L_DIV , // L.DIV781 INST_L_DIVU , // L.DIVU782 INST_L_SLL , // L.SLL , L.SLLI783 INST_L_SRL , // L.SRL , L.SRLI784 INST_L_SRA , // L.SRA , L.SRAI785 INST_L_ROR , // L.ROR , L.RORI786 INST_L_SFGES , // L.SFGES , L.SFGESI787 INST_L_SFGEU , // L.SFGEU , L.SFGEUI788 INST_L_SFGTS , // L.SFGTS , L.SFGTSI789 INST_L_SFGTU , // L.SFGTU , L.SFGTUI790 INST_L_SFLES , // L.SFLES , L.SFLESI791 INST_L_SFLEU , // L.SFLEU , L.SFLEUI792 INST_L_SFLTS , // L.SFLTS , L.SFLTSI793 INST_L_SFLTU , // L.SFLTU , L.SFLTUI794 INST_L_SFEQ , // L.SFEQ , L.SFEQI795 INST_L_SFNE , // L.SFNE , L.SFNEI796 INST_L_READ , // L.BNF , L.BF , L.JR797 INST_L_MOVHI , // L.MOVI798 INST_L_CSYNC , // L.CSYNC799 INST_L_MSYNC , // L.MSYNC800 INST_L_PSYNC , // L.PSYNC801 INST_L_RFE , // L.RFE802 INST_L_MAC , // L.MAC , L.MACI803 INST_L_MSB , // L.MSB804 INST_L_MACRC , // L.MACRC805 INST_L_2b , //806 INST_L_MEMB , // L.LBS , L.LBZ , L.SB807 INST_L_MEMH , // L.LHS , L.LHZ , L.SH808 INST_L_MEMW , // L.LWS , L.LWZ , L.SW809 INST_L_MEMD , // L.LD , L.SD810 INST_L_CUST1 , // L.CUST1811 INST_L_CUST2 , // L.CUST2812 INST_L_CUST3 , // L.CUST3813 INST_L_CUST4 , // L.CUST4814 INST_L_CUST5 , // L.CUST5815 INST_L_CUST6 , // L.CUST6816 INST_L_CUST7 , // L.CUST7817 INST_L_CUST8 , // L.CUST8818 INST_L_38 , //819 INST_L_39 , //820 INST_L_3a , //821 INST_L_3b , //822 INST_L_3c , //823 INST_L_3d , //824 INST_L_3e , //825 INST_NOP // L.NOP826 } opcod_t;827 828 #define LOG2_NB_INST_L 6829 #define NB_INST_L 64 // +1 -> INST_L_NO_IMPLEMENTED830 //#define NB_INST_L (INST_L_NO_IMPLEMENTED+1)831 1057 */ 832 1058 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h
r77 r78 2 2 #define Debug_component_H 3 3 4 #define DEBUG_Behavioural false 5 #define DEBUG_Generic false 6 #define DEBUG_Counter false 7 #define DEBUG_Group false 8 #define DEBUG_Queue false 9 #define DEBUG_Queue_Control false 10 #define DEBUG_Shifter false 11 #define DEBUG_RegisterFile false 12 #define DEBUG_RegisterFile_Monolithic false 13 #define DEBUG_RegisterFile_Multi_Banked false 14 #define DEBUG_Select false 15 #define DEBUG_Select_Priority_Fixed false 16 #define Debug_Victim false 17 #define DEBUG_Victim_Pseudo_LRU false 18 #define DEBUG_Core false 19 #define DEBUG_Multi_Execute_loop false 20 #define DEBUG_Execute_loop false 21 #define DEBUG_Multi_Execute_unit false 22 #define DEBUG_Execute_unit false 23 #define DEBUG_Functionnal_unit false 24 #define DEBUG_Load_store_unit false 25 #define DEBUG_Multi_Read_unit false 26 #define DEBUG_Read_unit false 27 #define DEBUG_Read_queue false 28 #define DEBUG_Reservation_station false 29 #define DEBUG_Multi_Write_unit false 30 #define DEBUG_Write_unit false 31 #define DEBUG_Execute_queue false 32 #define DEBUG_Write_queue false 33 #define DEBUG_Network true 34 #define DEBUG_Execution_unit_to_Write_unit true 35 #define DEBUG_Read_unit_to_Execution_unit true 36 #define DEBUG_Register_unit false 37 #define DEBUG_Register_unit_Glue false 38 #define DEBUG_Multi_Front_end false 39 #define DEBUG_Front_end false 40 #define DEBUG_Prediction_unit false 41 #define DEBUG_Direction false 42 #define DEBUG_Meta_Predictor false 43 #define DEBUG_Meta_Predictor_Glue false 44 #define DEBUG_Two_Level_Branch_Predictor false 45 #define DEBUG_Two_Level_Branch_Predictor_Glue false 46 #define DEBUG_Branch_History_Table false 47 #define DEBUG_Pattern_History_Table false 4 # define DEBUG_true true 5 # define DEBUG_false false 48 6 7 # define DEBUG_Behavioural false 8 # define DEBUG_Generic false 9 # define DEBUG_Counter false 10 # define DEBUG_Queue false 11 # define DEBUG_Queue_Control false 12 # define DEBUG_RegisterFile false 13 # define DEBUG_RegisterFile_Monolithic false 14 # define DEBUG_RegisterFile_Multi_Banked false 15 # define DEBUG_Select false 16 # define DEBUG_Select_Priority_Fixed false 17 # define DEBUG_Shifter false 18 # define DEBUG_Sort false 19 # define DEBUG_Victim false 20 # define DEBUG_Victim_Pseudo_LRU false 21 # define DEBUG_Core false 22 # define DEBUG_Multi_Execute_loop false 23 # define DEBUG_Execute_loop false 24 # define DEBUG_Multi_Execute_unit false 25 # define DEBUG_Execute_unit false 26 # define DEBUG_Functionnal_unit false 27 # define DEBUG_Load_store_unit false 28 # define DEBUG_Multi_Read_unit false 29 # define DEBUG_Read_unit false 30 # define DEBUG_Read_queue false 31 # define DEBUG_Reservation_station false 32 # define DEBUG_Multi_Write_unit false 33 # define DEBUG_Write_unit false 34 # define DEBUG_Execute_queue false 35 # define DEBUG_Write_queue false 36 # define DEBUG_Network false 37 # define DEBUG_Execution_unit_to_Write_unit false 38 # define DEBUG_Read_unit_to_Execution_unit false 39 # define DEBUG_Register_unit false 40 # define DEBUG_Register_unit_Glue false 41 # define DEBUG_Multi_Front_end false 42 # define DEBUG_Front_end false 43 # define DEBUG_Decod_unit false 44 # define DEBUG_Decod false 45 # define DEBUG_Ifetch_unit false 46 # define DEBUG_Address_management false 47 # define DEBUG_Ifetch_queue false 48 # define DEBUG_Ifetch_unit_Glue false 49 # define DEBUG_Prediction_unit false 50 # define DEBUG_Branch_Target_Buffer false 51 # define DEBUG_Branch_Target_Buffer_Glue false 52 # define DEBUG_Branch_Target_Buffer_Register false 53 # define DEBUG_Direction false 54 # define DEBUG_Direction_Glue false 55 # define DEBUG_Meta_Predictor false 56 # define DEBUG_Meta_Predictor_Glue false 57 # define DEBUG_Two_Level_Branch_Predictor false 58 # define DEBUG_Two_Level_Branch_Predictor_Glue false 59 # define DEBUG_Branch_History_Table false 60 # define DEBUG_Pattern_History_Table false 61 # define DEBUG_Return_Address_Stack true 62 # define DEBUG_Update_Prediction_Table true 63 # define DEBUG_Multi_OOO_Engine false 64 # define DEBUG_OOO_Engine false 65 # define DEBUG_Rename_unit false 66 # define DEBUG_Load_Store_pointer_unit false 67 # define DEBUG_Register_translation_unit false 68 # define DEBUG_Dependency_checking_unit false 69 # define DEBUG_Free_List_unit false 70 # define DEBUG_Register_Address_Translation_unit false 71 # define DEBUG_Register_translation_unit_Glue false 72 # define DEBUG_Stat_List_unit false 73 //#define DEBUG_Rename_queue true 74 # define DEBUG_Rename_select false 49 75 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Entity.h
r75 r78 78 78 #endif 79 79 80 public : bool test_map ( bool top_level);80 public : bool test_map (uint32_t depth,bool top_level); 81 81 82 82 #ifdef POSITION -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Environnement.h
r71 r78 22 22 # define DEBUG_TEST 23 23 #endif 24 25 #define MORPHEO_HOME "MORPHEO_HOME" -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface.h
r75 r78 229 229 #endif 230 230 231 public : bool test_map ( bool top_level);231 public : bool test_map (uint32_t depth, bool top_level); 232 232 233 233 #ifdef POSITION -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interfaces.h
r75 r78 80 80 #endif 81 81 82 public : bool test_map ( bool top_level);82 public : bool test_map (uint32_t depth, bool top_level); 83 83 84 84 public : friend std::ostream& operator<< (std::ostream& output_stream, -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Parameters.h
r77 r78 14 14 #include "Behavioural/include/Environnement.h" 15 15 #include "Behavioural/include/Constants.h" 16 #include "Behavioural/include/Test.h" 16 17 #include "Common/include/ErrorMorpheo.h" 17 18 #include "Common/include/ToString.h" … … 22 23 namespace behavioural { 23 24 25 class Parameters_test 26 { 27 private : std::string _component; 28 protected : std::string _error; 29 protected : std::string _warning; 30 protected : std::string _information; 31 32 public : Parameters_test (std::string component) 33 { 34 _component = component; 35 _error = ""; 36 _warning = ""; 37 }; 38 public : ~Parameters_test (void) {}; 39 40 public : bool have_error (void) { return (_error.length() != 0);}; 41 public : void error (std::string str) { _error += "[ ERROR ] <" + _component + "> " + str + "\n";} 42 public : void warning (std::string str) { _warning += "[ WARNING ] <" + _component + "> " + str + "\n";} 43 public : void information (std::string str) { _information += "[INFORMATION] <" + _component + "> " + str + "\n";} 44 public : std::string print (void) { return _error + _warning + _information;}; 45 }; 46 24 47 // Virtual Class - Interface of each component 25 48 class Parameters 26 49 { 27 50 // -----[ fields ]---------------------------------------------------- 28 public : static const uint32_t _nb_operation = MAX_OPERATION; 29 public : static const uint32_t _nb_type = MAX_TYPE; 30 public : static const uint32_t _size_operation = SIZE_OPERATION; 31 public : static const uint32_t _size_type = SIZE_TYPE; 32 public : static const uint32_t _size_exception = SIZE_EXCEPTION; 33 public : static const uint32_t _size_dcache_type = SIZE_DCACHE_TYPE; 34 public : static const uint32_t _size_dcache_error = SIZE_DCACHE_ERROR; 51 public : static const uint32_t _size_instruction = 32; 52 public : static const uint32_t _nb_operation = MAX_OPERATION; 53 public : static const uint32_t _nb_type = MAX_TYPE; 54 public : static const uint32_t _size_operation = SIZE_OPERATION; 55 public : static const uint32_t _size_type = SIZE_TYPE; 56 public : static const uint32_t _size_exception = SIZE_EXCEPTION; 57 public : static const uint32_t _size_exception_use = SIZE_EXCEPTION_USE; 58 public : static const uint32_t _size_exception_memory = SIZE_EXCEPTION_MEMORY; 59 public : static const uint32_t _size_exception_custom = SIZE_EXCEPTION_CUSTOM; 60 public : static const uint32_t _size_exception_alu = SIZE_EXCEPTION_ALU ; 61 public : static const uint32_t _size_exception_decod = SIZE_EXCEPTION_DECOD ; 62 public : static const uint32_t _size_exception_ifetch = SIZE_EXCEPTION_IFETCH; 63 public : static const uint32_t _size_icache_type = SIZE_ICACHE_TYPE; 64 public : static const uint32_t _size_icache_error = SIZE_ICACHE_ERROR; 65 public : static const uint32_t _size_dcache_type = SIZE_DCACHE_TYPE; 66 public : static const uint32_t _size_dcache_error = SIZE_DCACHE_ERROR; 67 public : static const uint32_t _nb_general_register_logic = 32; 68 public : static const uint32_t _nb_special_register_logic = NB_SPR_LOGIC; 69 public : static const uint32_t _size_general_register_logic = 5; 70 public : static const uint32_t _size_special_register_logic = LOG2_NB_SPR_LOGIC; 71 public : static const uint32_t _size_event_state = SIZE_EVENT_STATE; 72 public : static const uint32_t _size_event_type = SIZE_EVENT_TYPE; 73 public : static const uint32_t _size_branch_state = SIZE_BRANCH_STATE; 74 public : static const uint32_t _size_branch_condition = SIZE_BRANCH_CONDITION; 35 75 36 76 // -----[ methods ]--------------------------------------------------- 37 public : Parameters(void);38 public : virtual ~Parameters ();77 public : Parameters (void); 78 public : virtual ~Parameters (); 39 79 40 80 // methods to print and test parameters 41 public : virtual std::string print (uint32_t depth) = 0;42 public : virtual std::stringmsg_error (void) = 0;81 public : virtual std::string print (uint32_t depth) = 0; 82 public : virtual Parameters_test msg_error (void) = 0; 43 83 44 84 // methods to generate configuration file 45 46 85 47 86 // methods to test 48 public : void test (void); 49 public : bool is_natural (double val ); 50 public : bool is_positive (double val ); 51 public : bool is_multiple (uint32_t val1, 52 uint32_t val2); 53 public : bool is_between_inclusive (uint32_t val, 54 uint32_t min, 55 uint32_t max); 56 public : bool is_between_exclusive (uint32_t val, 57 uint32_t min, 58 uint32_t max); 87 public : void test (void); 59 88 }; 60 61 89 }; // end namespace behavioural 62 90 }; // end namespace morpheo -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h
r75 r78 51 51 52 52 // -----[ fields ]---------------------------------------------------- 53 private : const std::string 53 private : const std::string _name ; 54 54 private : const direction_t _direction ; 55 55 private : const presence_port_t _presence_port ; 56 56 private : uint32_t _size ; 57 57 58 private : Signal * _connect_to_signal; // the actual implementaion, this signal link with one signal (but if signal is an output, it can be connect with many signal ...) 59 private : Signal * _connect_from_signal; // producter of signal. If NULL, then producteur is the current entity 60 private : bool _is_allocate ; // Have allocate a sc_in or sc_out port 61 private : void * _sc_signal ; // sc_in or sc_out associated at this signal 62 private : void * _sc_signal_map ; // sc_out generated this signal 63 private : bool _is_map_as_src ; 64 private : bool _is_map_as_dest; 65 private : type_info_t _type_info ; 58 private : Signal * _connect_to_signal ; // the actual implementaion, this signal link with one signal (but if signal is an output, it can be connect with many signal ...) 59 private : Signal * _connect_from_signal ; // producter of signal. If NULL, then producteur is the current entity 60 private : bool _is_allocate ; // Have allocate a sc_in or sc_out port 61 private : void * _sc_signal ; // sc_in or sc_out associated at this signal 62 private : void * _sc_signal_map ; // sc_out generated this signal 63 private : bool _is_map_as_toplevel_dest ; 64 private : bool _is_map_as_component_src ; 65 private : bool _is_map_as_component_dest; 66 private : type_info_t _type_info ; 66 67 67 68 #ifdef VHDL_TESTBENCH … … 90 91 public : bool presence_testbench (void); 91 92 92 public : bool test_map ( bool top_level);93 public : bool test_map (uint32_t depth, bool top_level); 93 94 94 95 public : void link (Signal * signal_dest, -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Stat.h
r75 r78 60 60 bool _generate_file; 61 61 62 public : Stat (std::string name_instance, 63 std::string name_component, 64 Parameters_Statistics * param); 62 public : Stat (std::string name_instance, 63 std::string name_component, 64 Parameters_Statistics * param); 65 public : Stat (std::string name_instance, 66 std::string name_component, 67 cycle_t nb_cycle_before_begin=0, 68 cycle_t period=0); 69 public : ~Stat (void); 65 70 66 public : Stat (std::string name_instance, 67 std::string name_component, 68 cycle_t nb_cycle_before_begin=0, 69 cycle_t period=0); 70 public : ~Stat (void); 71 72 public : counter_t * create_variable (std::string varname); 73 public : counter_t * create_counter (std::string varname, 74 std::string unit, 75 std::string description); 76 private : counter_t * alloc_operand (counter_type_t type, 77 std::string varname, 78 std::string unit, 79 std::string description); 80 public : void create_expr (std::string varname, 81 std::string expr, 82 bool each_cycle=true); 71 public : counter_t * create_variable (std::string varname); 72 public : counter_t * create_counter (std::string varname, 73 std::string unit, 74 std::string description); 75 private : counter_t * alloc_operand (counter_type_t type, 76 std::string varname, 77 std::string unit, 78 std::string description); 83 79 84 private : Stat_binary_tree * string2tree (std::string expr); 80 public : void create_expr (std::string varname, 81 std::string expr, 82 bool each_cycle=false); 83 public : void create_expr_average (std::string varname, 84 std::string expr_sum, 85 std::string expr_deps, 86 std::string unit, 87 std::string description); 85 88 86 public : void end_cycle (void); 87 private : void end_simulation (void); 88 private : void test_and_save (bool force_save=false); 89 private : void eval_exprs (bool only_each_cycle=true); 90 private : void eval_expr (expr_t expr); 91 92 private : bool is_valid_var (std::string expr); 89 public : void create_expr_average_by_cycle (std::string varname, 90 std::string expr_sum, 91 std::string unit, 92 std::string description); 93 93 94 private : void generate_file (void); 94 public : void create_expr_percent (std::string varname, 95 std::string expr_sum, 96 std::string expr_max, 97 std::string description); 95 98 96 private : bool have_counter (void);99 private : Stat_binary_tree * string2tree (std::string expr); 97 100 98 public : void add_stat (Stat * stat); 101 public : void end_cycle (void); 102 private : void end_simulation (void); 99 103 100 public : std::string print (uint32_t depth=0); 104 private : void test_and_save (bool force_save=false); 105 106 private : void eval_exprs (bool only_each_cycle=true); 107 private : void eval_expr (expr_t expr); 108 109 private : bool is_valid_var (std::string expr); 110 111 private : void generate_file (void); 112 113 private : bool have_counter (void); 114 115 public : void add_stat (Stat * stat); 116 117 public : std::string print (uint32_t depth=0); 101 118 }; 102 119 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h
r77 r78 4 4 #include "Common/include/Types.h" 5 5 #include "Common/include/ToString.h" 6 #include "Common/include/FromString.h" 7 #include "Common/include/ErrorMorpheo.h" 6 8 #include "Behavioural/include/Constants.h" 7 9 … … 14 16 15 17 // ***** general 16 typedef bool Tcontrol_t; 17 typedef uint32_t Toperation_t; 18 //typedef uint32_t Tdestination1_t; 19 //typedef uint32_t Tdestination2_t; 20 //typedef uint32_t Texec_flag_t; 21 //typedef bool Texec_excep_t; 22 //typedef uint32_t Tcondition_t; 23 //typedef uint32_t Tbranch_state_t; 24 25 typedef uint32_t Texception_t; 26 typedef uint32_t Tcontext_t; 27 typedef uint32_t Tpacket_t; 28 typedef uint32_t Ttype_t; 29 30 // ***** Register 31 typedef uint32_t Tgeneral_address_t; 32 typedef uint32_t Tgeneral_data_t; 33 typedef uint32_t Tspecial_address_t; 34 typedef uint32_t Tspecial_data_t; 18 typedef uint32_t Tinstruction_t; 19 typedef bool Tcontrol_t; 20 typedef uint8_t Toperation_t; 21 //typedef uint32_t Tdestination1_t; 22 //typedef uint32_t Tdestination2_t; 23 //typedef uint32_t Texec_flag_t; 24 //typedef bool Texec_excep_t; 25 26 typedef uint8_t Texception_t; 27 typedef uint8_t Tcontext_t; 28 typedef uint8_t Tpacket_t; 29 typedef uint8_t Ttype_t; 30 typedef uint8_t Tevent_state_t; 31 typedef uint8_t Tevent_type_t; 32 typedef uint8_t Tcounter_t; // universal counter 33 typedef uint8_t Tptr_t; // universal pointer 34 35 // ***** Register 36 typedef uint32_t Tgeneral_address_t; 37 typedef uint32_t Tgeneral_data_t; 38 typedef uint32_t Tspecial_address_t; 39 typedef uint32_t Tspecial_data_t; 35 40 36 41 // ***** component dependant 37 // ~~~~~ load store queue 38 typedef uint32_t Taccess_t; 39 typedef uint32_t Tlsq_ptr_t; 40 typedef uint32_t Tdcache_address_t; 41 typedef uint32_t Tdcache_data_t; 42 typedef bool Tdcache_error_t; 43 typedef uint32_t Tdcache_type_t; 42 // ~~~~~ load store queue 43 typedef uint8_t Taccess_t; 44 typedef uint8_t Tlsq_ptr_t; 45 typedef uint32_t Tdcache_address_t; 46 typedef uint32_t Tdcache_data_t; 47 typedef bool Tdcache_error_t; 48 typedef uint8_t Tdcache_type_t; 49 50 // ~~~~~ prediction_unit 51 typedef uint8_t Thistory_t; 52 typedef uint8_t Tprediction_ptr_t; 53 typedef uint8_t Tbranch_state_t; 54 typedef uint8_t Tbranch_condition_t; 55 typedef uint8_t Tdepth_t; 56 typedef Tgeneral_data_t Taddress_t; 57 58 59 // ~~~~~ ifetch 60 typedef uint8_t Tinst_ifetch_ptr_t; 61 typedef uint8_t Tifetch_queue_ptr_t; 62 typedef uint32_t Ticache_address_t; 63 typedef uint32_t Ticache_instruction_t; 64 typedef bool Ticache_error_t; 65 typedef uint8_t Ticache_type_t; 66 67 typedef enum 68 { 69 PRIORITY_STATIC, 70 PRIORITY_ROUND_ROBIN 71 } Tpriority_t; 72 73 typedef enum 74 { 75 LOAD_BALANCING_BALANCE, 76 LOAD_BALANCING_MAXIMUM_FOR_PRIORITY 77 } Tload_balancing_t; 78 79 typedef enum 80 { 81 VICTIM_RANDOM , // Random 82 VICTIM_ROUND_ROBIN, // Round Robin 83 VICTIM_NLU , // Not Last Used 84 VICTIM_PSEUDO_LRU , // Pseudo Least Recently Used 85 VICTIM_LRU , // Least Recently Used 86 VICTIM_FIFO // First IN First OUT 87 } Tvictim_t; 88 89 typedef enum 90 { 91 PREDICTOR_NEVER_TAKE , // Branch is never Take 92 PREDICTOR_ALWAYS_TAKE , // Branch is always Take 93 PREDICTOR_STATIC , // If the adress of destination is previous, then the branch is take 94 PREDICTOR_LAST_TAKE , // The direction is as the last time (if is the first time : static) 95 PREDICTOR_COUNTER , // Counter table 96 PREDICTOR_LOCAL , // Counter bank indexed with history bank 97 PREDICTOR_GLOBAL , // Counter bank indexed with history table 98 PREDICTOR_META , // A meta_predictor choose between 2 predictor : the local or the global 99 PREDICTOR_CUSTOM // Note predefined scheme 100 } Tpredictor_t; 44 101 45 102 //----------------------------------------------[ spr_mode_access ]----- … … 56 113 } 57 114 }; 58 59 inline Tcontext_t get_num_thread (Tcontext_t num_context_id , uint32_t size_context_id ,60 Tcontext_t num_front_end_id , uint32_t size_front_end_id ,61 Tcontext_t num_ooo_engine_id, uint32_t size_ooo_engine_id)62 {63 return ((num_ooo_engine_id << (size_context_id + size_front_end_id)) |64 (num_front_end_id << (size_context_id)) |65 (num_context_id));66 }67 68 inline uint32_t get_nb_thread (uint32_t nb_context ,69 uint32_t nb_front_end ,70 uint32_t nb_ooo_engine )71 {72 return (nb_ooo_engine *73 nb_front_end *74 nb_context) ;75 }76 115 77 116 }; // end namespace behavioural … … 96 135 }; 97 136 137 template<> inline std::string toString<morpheo::behavioural::Tpriority_t>(const morpheo::behavioural::Tpriority_t& x) 138 { 139 switch (x) 140 { 141 case morpheo::behavioural::PRIORITY_STATIC : return "priority_static"; break; 142 case morpheo::behavioural::PRIORITY_ROUND_ROBIN : return "priority_round_robin"; break; 143 default : return "" ; break; 144 } 145 }; 146 147 template<> inline morpheo::behavioural::Tpriority_t fromString<morpheo::behavioural::Tpriority_t>(const std::string& x) 148 { 149 if ( (x.compare("0") == 0) or 150 (x.compare("priority_static") == 0)) 151 return morpheo::behavioural::PRIORITY_STATIC; 152 if ( (x.compare("1") == 0) or 153 (x.compare("priority_round_robin") == 0)) 154 return morpheo::behavioural::PRIORITY_ROUND_ROBIN; 155 throw (ERRORMORPHEO ("fromString","Unknow string : \""+x+"\"")); 156 }; 157 158 template<> inline std::string toString<morpheo::behavioural::Tload_balancing_t>(const morpheo::behavioural::Tload_balancing_t& x) 159 { 160 switch (x) 161 { 162 case morpheo::behavioural::LOAD_BALANCING_BALANCE : return "load_balancing_balance"; break; 163 case morpheo::behavioural::LOAD_BALANCING_MAXIMUM_FOR_PRIORITY : return "load_balancing_maximum_for_priority"; break; 164 default : return "" ; break; 165 } 166 }; 167 168 template<> inline morpheo::behavioural::Tload_balancing_t fromString<morpheo::behavioural::Tload_balancing_t>(const std::string& x) 169 { 170 if ( (x.compare("0") == 0) or 171 (x.compare("load_balancing_balance") == 0)) 172 return morpheo::behavioural::LOAD_BALANCING_BALANCE; 173 if ( (x.compare("1") == 0) or 174 (x.compare("load_balancing_maximum_for_priority") == 0)) 175 return morpheo::behavioural::LOAD_BALANCING_MAXIMUM_FOR_PRIORITY; 176 throw (ERRORMORPHEO ("fromString","Unknow string : \""+x+"\"")); 177 }; 178 179 template<> inline std::string toString<morpheo::behavioural::Tvictim_t>(const morpheo::behavioural::Tvictim_t& x) 180 { 181 switch (x) 182 { 183 case morpheo::behavioural::VICTIM_RANDOM : return "victim_random" ; break; 184 case morpheo::behavioural::VICTIM_ROUND_ROBIN : return "victim_round_robin"; break; 185 case morpheo::behavioural::VICTIM_NLU : return "victim_nlu" ; break; 186 case morpheo::behavioural::VICTIM_PSEUDO_LRU : return "victim_pseudo_lru" ; break; 187 case morpheo::behavioural::VICTIM_LRU : return "victim_lru" ; break; 188 case morpheo::behavioural::VICTIM_FIFO : return "victim_fifo" ; break; 189 default : return "" ; break; 190 } 191 }; 192 193 template<> inline morpheo::behavioural::Tvictim_t fromString<morpheo::behavioural::Tvictim_t>(const std::string& x) 194 { 195 if ( (x.compare("0") == 0) or 196 (x.compare("victim_random") == 0)) 197 return morpheo::behavioural::VICTIM_RANDOM; 198 if ( (x.compare("1") == 0) or 199 (x.compare("victim_round_robin") == 0)) 200 return morpheo::behavioural::VICTIM_ROUND_ROBIN; 201 if ( (x.compare("2") == 0) or 202 (x.compare("victim_nlu") == 0)) 203 return morpheo::behavioural::VICTIM_NLU; 204 if ( (x.compare("3") == 0) or 205 (x.compare("victim_pseudo_lru") == 0)) 206 return morpheo::behavioural::VICTIM_PSEUDO_LRU; 207 if ( (x.compare("4") == 0) or 208 (x.compare("victim_lru") == 0)) 209 return morpheo::behavioural::VICTIM_LRU; 210 if ( (x.compare("5") == 0) or 211 (x.compare("victim_fifo") == 0)) 212 return morpheo::behavioural::VICTIM_FIFO; 213 throw (ERRORMORPHEO ("fromString","Unknow string : \""+x+"\"")); 214 }; 215 216 template<> inline std::string toString<morpheo::behavioural::Tpredictor_t>(const morpheo::behavioural::Tpredictor_t& x) 217 { 218 switch (x) 219 { 220 case morpheo::behavioural::PREDICTOR_NEVER_TAKE : return "predictor_never_take" ; break; 221 case morpheo::behavioural::PREDICTOR_ALWAYS_TAKE : return "predictor_always_take"; break; 222 case morpheo::behavioural::PREDICTOR_STATIC : return "predictor_static" ; break; 223 case morpheo::behavioural::PREDICTOR_LAST_TAKE : return "predictor_last_take" ; break; 224 case morpheo::behavioural::PREDICTOR_COUNTER : return "predictor_counter" ; break; 225 case morpheo::behavioural::PREDICTOR_LOCAL : return "predictor_local" ; break; 226 case morpheo::behavioural::PREDICTOR_GLOBAL : return "predictor_global" ; break; 227 case morpheo::behavioural::PREDICTOR_META : return "predictor_meta" ; break; 228 case morpheo::behavioural::PREDICTOR_CUSTOM : return "predictor_custom" ; break; 229 default : return "" ; break; 230 } 231 }; 232 233 template<> inline morpheo::behavioural::Tpredictor_t fromString<morpheo::behavioural::Tpredictor_t>(const std::string& x) 234 { 235 if ( (x.compare("0") == 0) or 236 (x.compare("predictor_never_take") == 0)) 237 return morpheo::behavioural::PREDICTOR_NEVER_TAKE; 238 if ( (x.compare("1") == 0) or 239 (x.compare("predictor_always_take") == 0)) 240 return morpheo::behavioural::PREDICTOR_ALWAYS_TAKE; 241 if ( (x.compare("2") == 0) or 242 (x.compare("predictor_static") == 0)) 243 return morpheo::behavioural::PREDICTOR_STATIC; 244 if ( (x.compare("3") == 0) or 245 (x.compare("predictor_last_take") == 0)) 246 return morpheo::behavioural::PREDICTOR_LAST_TAKE; 247 if ( (x.compare("4") == 0) or 248 (x.compare("predictor_counter") == 0)) 249 return morpheo::behavioural::PREDICTOR_COUNTER; 250 if ( (x.compare("5") == 0) or 251 (x.compare("predictor_local") == 0)) 252 return morpheo::behavioural::PREDICTOR_LOCAL; 253 if ( (x.compare("6") == 0) or 254 (x.compare("predictor_global") == 0)) 255 return morpheo::behavioural::PREDICTOR_GLOBAL; 256 if ( (x.compare("7") == 0) or 257 (x.compare("predictor_meta") == 0)) 258 return morpheo::behavioural::PREDICTOR_META; 259 if ( (x.compare("8") == 0) or 260 (x.compare("predictor_custom") == 0)) 261 return morpheo::behavioural::PREDICTOR_CUSTOM; 262 throw (ERRORMORPHEO ("fromString","Unknow string : \""+x+"\"")); 263 }; 264 98 265 }; // end namespace morpheo 99 100 266 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_port_map.cpp
r76 r78 20 20 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 21 21 22 // log_printf(NONE,Behavioural,FUNCTION,"Map %s.%s with %s.%s", 23 // component_src.c_str(), 24 // port_src.c_str(), 25 // component_dest.c_str(), 26 // port_dest.c_str()); 27 22 28 std::string name_entity = _entity->get_name(); 23 29 24 30 // First entity 25 31 Entity * entity_dest = find_entity(component_dest); 26 27 32 28 33 if (entity_dest == NULL) … … 53 58 54 59 // need an internal signal ? 55 bool src_is_port = entity_src == _entity;56 bool dest_is_port = entity_dest == _entity;60 bool src_is_port = (entity_src == _entity); 61 bool dest_is_port = (entity_dest == _entity); 57 62 58 63 if (src_is_port == true) … … 67 72 // 68 73 // Interface Component 69 // | |74 // | | 70 75 // ----> (IN) --X-> (IN) 71 // | |76 // | | 72 77 // <-X-- (OUT) <---- (OUT) 73 78 // | | … … 89 94 } 90 95 96 // Create internal signal 91 97 signal_dest= signal_internal (entity_productor, signal_productor); 92 98 signal_dest->set_size_max(signal_src->get_size()); 93 94 dest_is_port = false;95 99 } 96 100 … … 111 115 }; 112 116 113 void Component::port_map (std::string component_src ,114 std::string port_src )115 {116 log_printf(FUNC,Behavioural,FUNCTION,"Begin");117 118 Entity * entity_src = find_entity(component_src);119 120 if (entity_src == NULL)121 throw (ErrorMorpheo ("<Component::port_map> in component \""+_entity->get_name()+"\", port map with unknow component \""+component_src+"\"."));122 123 Signal * signal_src = entity_src->find_signal (port_src);124 125 if (signal_src == NULL)126 throw (ErrorMorpheo ("<Component::port_map> in component \""+_entity->get_name()+"\", port map with component \""+component_src+"\" and a unknow signal \""+port_src+"\"."));127 128 // need an internal signal ?129 130 if (entity_src == _entity)131 throw (ErrorMorpheo ("<Component::port_map> src can't be an interface's port of the top level."));132 133 if (signal_src->get_direction() != OUT)134 throw (ErrorMorpheo ("<Component::port_map> the direction of the signal '"+signal_src->get_name()+"' must be OUT."));135 136 Signal * signal_dest;137 138 signal_dest= signal_internal (entity_src, signal_src);139 signal_dest->set_size_max(signal_src->get_size());140 141 try142 {143 signal_src->link(signal_dest,144 false);145 }146 catch (morpheo::ErrorMorpheo & error)147 {148 throw (ErrorMorpheo ("<Component::port_map> Error in mapping "+entity_src ->get_name()+"."+signal_src ->get_name()+" :\n"+error.what ()));149 }150 //catch (...)151 // {152 // }153 154 log_printf(FUNC,Behavioural,FUNCTION,"End");155 };156 157 117 }; // end namespace behavioural 158 118 }; // end namespace morpheo 159 119 120 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_set_component.cpp
r57 r78 29 29 Tcomponent_t * entry = new Tcomponent_t; 30 30 31 // entry->_component= component; 31 32 entry->_instance = instance; 32 33 entry->_entity = entity; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_test_map.cpp
r75 r78 13 13 #undef FUNCTION 14 14 #define FUNCTION "Component::test_map" 15 bool Component::test_map (void) 15 bool Component::test_map (bool recursive) 16 { 17 return test_map (0, recursive); 18 } 19 20 bool Component::test_map (uint32_t depth, bool recursive) 16 21 { 17 22 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 18 23 24 std::string tab = std::string(depth,'\t'); 19 25 std::string name = _entity->get_name(); 20 26 bool test_ok = true; 27 21 28 if (_list_component->empty () == true) 22 log_printf(NONE,Behavioural,FUNCTION, "Component \"%s\" is a behavioural description",name.c_str()); 29 { 30 log_printf(NONE,Behavioural,FUNCTION, "%s* Component \"%s\" is a behavioural description",tab.c_str(),name.c_str()); 31 } 23 32 else 24 33 { 25 log_printf(NONE,Behavioural,FUNCTION, " Component \"%s\" is a structural description",name.c_str());34 log_printf(NONE,Behavioural,FUNCTION, "%s* Component \"%s\" is a structural description",tab.c_str(),name.c_str()); 26 35 27 log_printf(INFO,Behavioural,FUNCTION, " Test port I/O");36 log_printf(INFO,Behavioural,FUNCTION, "%s* Test port I/O",tab.c_str()); 28 37 29 test_ok &= _entity->test_map( true);38 test_ok &= _entity->test_map(1,true); 30 39 31 log_printf(INFO,Behavioural,FUNCTION, " Test all internal component");40 log_printf(INFO,Behavioural,FUNCTION, "%s* Test all internal component",tab.c_str()); 32 41 33 42 for (std::list<Tcomponent_t *>::iterator i= _list_component->begin(); 34 43 i != _list_component->end(); 35 44 ++i) 36 test_ok &= (*i)->_entity->test_map(false); 45 test_ok &= (*i)->_entity->test_map(1,false); 46 47 // if (recursive) 48 // for (std::list<Tcomponent_t *>::iterator i= _list_component->begin(); 49 // i != _list_component->end(); 50 // ++i) 51 // test_ok &= (*i)->_component->test_map(1,recursive); 37 52 } 38 53 … … 40 55 41 56 if (test_ok == false) 42 throw (E rrorMorpheo ("<Component::test_map>A lot of port is not connected."));57 throw (ERRORMORPHEO (FUNCTION,"A lot of port is not connected.")); 43 58 44 59 return test_ok; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Entity_test_map.cpp
r62 r78 7 7 8 8 #include "Behavioural/include/Entity.h" 9 9 #include <iostream> 10 10 11 11 namespace morpheo { … … 14 14 #undef FUNCTION 15 15 #define FUNCTION "Entity::test_map" 16 bool Entity::test_map ( bool top_level)16 bool Entity::test_map (uint32_t depth, bool top_level) 17 17 { 18 18 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 19 19 20 log_printf(NONE,Behavioural,FUNCTION, " * Test mapping : Entity \"%s\"",_name.c_str()); 20 std::string tab = std::string(depth,'\t'); 21 log_printf(NONE,Behavioural,FUNCTION, "%s* Test mapping : Entity \"%s\"",tab.c_str(),_name.c_str()); 21 22 22 bool _return = _interfaces->test_map(top_level); 23 bool _return = _interfaces->test_map(depth+1,top_level); 24 25 #ifndef DEBUG 26 if (_return == false) 27 { 28 std::cerr << "In entity \"" << _name << "\" (type : \"" << _type << "\"), a lot of port is not connected !" << std::endl; 29 } 30 #endif 23 31 24 32 log_printf(FUNC,Behavioural,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_test_map.cpp
r75 r78 14 14 #undef FUNCTION 15 15 #define FUNCTION "Interface::test_map" 16 bool Interface::test_map ( bool top_level)16 bool Interface::test_map (uint32_t depth, bool top_level) 17 17 { 18 18 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 19 19 20 std::string tab = std::string(depth,'\t'); 20 21 bool _return = true; 21 22 22 log_printf( INFO,Behavioural,FUNCTION, " * Interface \"%s\"",_name.c_str());23 log_printf(NONE,Behavioural,FUNCTION, "%s* Interface \"%s\"",tab.c_str(),_name.c_str()); 23 24 24 25 for (std::list<Signal*>::iterator i = _list_signal->begin(); 25 26 i != _list_signal->end(); 26 27 ++i) 27 _return &= (*i)->test_map( top_level);28 _return &= (*i)->test_map(depth+1,top_level); 28 29 29 30 log_printf(FUNC,Behavioural,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces_test_map.cpp
r75 r78 14 14 #undef FUNCTION 15 15 #define FUNCTION "Interfaces::test_map" 16 bool Interfaces::test_map ( bool top_level)16 bool Interfaces::test_map (uint32_t depth, bool top_level) 17 17 { 18 18 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 19 19 20 std::string tab = std::string(depth,'\t'); 21 20 22 bool _return = true; 21 23 22 log_printf( INFO,Behavioural,FUNCTION, " * Interfaces \"%s\"",_name.c_str());24 log_printf(NONE,Behavioural,FUNCTION, "%s* Interfaces \"%s\"",tab.c_str(),_name.c_str()); 23 25 24 26 for (std::list<Interface_fifo*>::iterator i = _list_interface->begin(); 25 27 i != _list_interface->end(); 26 28 ++i) 27 _return &= (*i)->test_map( top_level);29 _return &= (*i)->test_map(depth+1, top_level); 28 30 29 31 log_printf(FUNC,Behavioural,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Parameters_test.cpp
r71 r78 17 17 { 18 18 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 19 std::string msg = msg_error(); 19 20 Parameters_test x = msg_error(); 20 21 21 if (msg.length() != 0) 22 throw (ErrorMorpheo (msg)); 22 std::cerr << x.print() << std::endl; 23 24 if (x.have_error()) 25 throw (ErrorMorpheo ("Error(s) in parameters")); 26 23 27 log_printf(FUNC,Behavioural,FUNCTION,"End"); 24 28 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal.cpp
r75 r78 20 20 { 21 21 log_printf(FUNC,Behavioural,"Signal","Begin"); 22 _size = size; 23 _is_allocate = false; 24 _is_map_as_src = false; 25 _is_map_as_dest = false; 26 _connect_from_signal = NULL; 27 _connect_to_signal = NULL; 28 _sc_signal = NULL; 29 _sc_signal_map = NULL; 30 _type_info = UNKNOW; 22 _size = size; 23 _is_allocate = false; 24 _is_map_as_component_src = false; 25 _is_map_as_component_dest = false; 26 _is_map_as_toplevel_dest = false; 27 _connect_from_signal = NULL; 28 _connect_to_signal = NULL; 29 _sc_signal = NULL; 30 _sc_signal_map = NULL; 31 _type_info = UNKNOW; 31 32 #ifdef VHDL_TESTBENCH 32 33 _list_value = new std::list<std::string>; 33 34 #endif 35 36 if (_size == 0) 37 throw ERRORMORPHEO(FUNCTION,"Size of signal '"+_name+"' is nul"); 38 39 34 40 log_printf(FUNC,Behavioural,"Signal","End"); 35 41 }; … … 41 47 { 42 48 log_printf(FUNC,Behavioural,"Signal (copy)","Begin"); 43 _size = signal._size; 44 _is_allocate = signal._is_allocate; 45 _is_map_as_src = signal._is_map_as_src ; 46 _is_map_as_dest = signal._is_map_as_dest; 47 _connect_from_signal = signal._connect_from_signal; 48 _connect_to_signal = signal._connect_to_signal; 49 _sc_signal = signal._sc_signal ; 50 _sc_signal_map = signal._sc_signal_map; 51 _type_info = signal._type_info ; 49 _size = signal._size; 50 _is_allocate = signal._is_allocate; 51 _is_map_as_component_src = signal._is_map_as_component_src ; 52 _is_map_as_component_dest = signal._is_map_as_component_dest; 53 _is_map_as_toplevel_dest = signal._is_map_as_component_dest; 54 _connect_from_signal = signal._connect_from_signal; 55 _connect_to_signal = signal._connect_to_signal; 56 _sc_signal = signal._sc_signal ; 57 _sc_signal_map = signal._sc_signal_map; 58 _type_info = signal._type_info ; 52 59 #ifdef VHDL_TESTBENCH 53 _list_value = signal._list_value;60 _list_value = signal._list_value; 54 61 #endif 55 62 log_printf(FUNC,Behavioural,"Signal (copy)","End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_connect.cpp
r75 r78 17 17 { 18 18 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 19 20 //std::cout << "connected : " << get_name() << "\twith " << signal_dest->get_name() << std::endl; 21 19 20 // log_printf(TRACE,Behavioural,FUNCTION,"Connection between : %s with %s",get_name().c_str(),signal_dest->get_name().c_str()); 21 // log_printf(ALL,Behavioural,FUNCTION," * source"); 22 // log_printf(ALL,Behavioural,FUNCTION," * direction : %s",toString(_direction).c_str()); 23 // log_printf(ALL,Behavioural,FUNCTION," * sc_signal : %.8x",_sc_signal); 24 // log_printf(ALL,Behavioural,FUNCTION," * type_info : %s",toString(_type_info).c_str()); 25 // log_printf(ALL,Behavioural,FUNCTION," * destination"); 26 // log_printf(ALL,Behavioural,FUNCTION," * direction : %s",toString(signal_dest->_direction).c_str()); 27 // log_printf(ALL,Behavioural,FUNCTION," * sc_signal : %.8x",signal_dest->_sc_signal); 28 // log_printf(ALL,Behavioural,FUNCTION," * type_info : %s",toString(signal_dest->_type_info).c_str()); 29 22 30 if ((_direction == IN ) and (signal_dest->_direction == IN )) 23 31 switch (_type_info) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_link.cpp
r65 r78 17 17 bool signal_dest_is_port) 18 18 { 19 // signal_dest_is_port == 1 when the signal dest is in a top level interface. (else, signal_dest is type "INTERNAL") 20 19 21 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 20 22 … … 23 25 // Test 24 26 if (signal_src ->_is_allocate == false) 25 throw (E rrorMorpheo ("<Signal::link>Signal \""+_name+"\", can't map with signal \""+ get_name()+"\", because the first signal is not already allocate."));27 throw (ERRORMORPHEO (FUNCTION,"Signal \""+_name+"\", can't map with signal \""+ get_name()+"\", because the first signal is not already allocate.")); 26 28 if (signal_dest->_is_allocate == false) 27 throw (ErrorMorpheo ("<Signal::link> Signal \""+_name+"\", can't map with signal \""+signal_dest->get_name()+"\", because the second signal is not already allocate.")); 28 if (signal_src ->_is_map_as_src == true) 29 throw (ErrorMorpheo ("<Signal::mapping> Can't mapping signal \""+_name+"\" with \""+signal_dest->get_name()+"\", because the first signal is already mapped.")); 29 throw (ERRORMORPHEO (FUNCTION,"Signal \""+_name+"\", can't map with signal \""+signal_dest->get_name()+"\", because the second signal is not already allocate.")); 30 30 31 31 // List of all case … … 43 43 not (not signal_dest_is_port and (((signal_src->_direction == IN ) and (signal_dest->_direction == INTERNAL)) or 44 44 ((signal_src->_direction == OUT) and (signal_dest->_direction == INTERNAL))))) 45 throw (ErrorMorpheo ("<Signal::link> Signal \""+_name+"\" can't been linked with signal \""+signal_dest->get_name()+"\" : illegal direction ("+toString(signal_src->_direction)+" with "+toString(signal_dest->_direction)+").")); 45 throw (ERRORMORPHEO (FUNCTION,"Signal \""+_name+"\" can't been linked with signal \""+signal_dest->get_name()+"\" : illegal direction ("+toString(signal_src->_direction)+" with "+toString(signal_dest->_direction)+").")); 46 47 48 // Multi consumer is authorized , no to multi producer! 49 bool source_have_multi_consumer = (signal_src ->_connect_to_signal != NULL); 50 // bool destination_have_multi_producer = (signal_dest->_connect_from_signal != NULL) and (signal_dest_is_port == false); 51 // if (destination_have_multi_producer) 52 // // throw (ERRORMORPHEO (FUNCTION,"Signal \""+_name+"\" can't been linked with signal \""+signal_dest->get_name()+"\" : destination have multi producer.")); 53 // log_printf(NONE,Behavioural,FUNCTION,"Signal \"%s\" can't been linked with signal \"%s\" : destination have multi producer.",_name.c_str(),signal_dest->get_name().c_str()); 46 54 47 55 // update info source 48 signal_src ->_connect_to_signal = signal_dest; 49 signal_src ->_is_map_as_src = true; 56 signal_src ->_connect_to_signal = signal_dest; 57 signal_src ->_is_map_as_component_src = true; 58 59 // update info destination 60 if (signal_dest_is_port == true) 61 signal_dest->_is_map_as_toplevel_dest = true; // because toplevel port can't be a source 62 else 63 // signal_dest is a internal signal 64 if (signal_src->_direction == OUT) 65 signal_dest->_is_map_as_component_dest = true; 66 else 67 signal_dest->_is_map_as_component_src = true; 50 68 51 // update info destination52 signal_dest->_connect_from_signal = signal_src;53 signal_dest->_is_map_as_dest = true;54 55 69 // an internal signal and port can't be a source. 56 70 // also, to fill the connect_to_signal's field 57 if ((signal_src->_direction == OUT) and 58 (signal_dest->_direction == INTERNAL)) 59 { 60 signal_dest->_connect_to_signal = signal_src; 61 } 71 if (signal_dest->_direction == INTERNAL) 72 if (signal_src->_direction == OUT) 73 signal_dest->_connect_from_signal = signal_src; 74 else 75 signal_dest->_connect_to_signal = signal_src; 76 else 77 signal_dest->_connect_from_signal = signal_src; 78 79 62 80 63 81 // vhdl_testbench : to read an output producte by a internal component … … 66 84 (signal_src ->_direction == OUT)) 67 85 signal_dest->_sc_signal_map = signal_src ->_sc_signal_map; 68 69 connect (signal_dest); 86 87 // A signal can be connect once 88 if (not source_have_multi_consumer) 89 connect (signal_dest); 70 90 71 91 log_printf(FUNC,Behavioural,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_test_map.cpp
r75 r78 14 14 #undef FUNCTION 15 15 #define FUNCTION "Signal::test_map" 16 bool Signal::test_map ( bool top_level)16 bool Signal::test_map (uint32_t depth, bool top_level) 17 17 { 18 18 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 19 19 20 log_printf(INFO,Behavioural,FUNCTION, " * Signal \"%s\"",_name.c_str()); 21 22 bool _return = false; 20 std::string str = ""; 21 std::string tab = std::string(depth,'\t'); 22 // log_printf(NONE,Behavioural,FUNCTION, "%s* Signal \"%s\"",tab.c_str(),_name.c_str()); 23 // log_printf(NONE,Behavioural,FUNCTION, "%s%d - %d - %d",tab.c_str(), 24 // _is_map_as_toplevel_dest, 25 // _is_map_as_component_src, 26 // _is_map_as_component_dest); 27 bool _return = true; 23 28 24 29 if (top_level == true) 25 30 { 26 _return = _is_map_as_dest;27 28 31 switch (_direction) 29 32 { 30 33 case morpheo::behavioural::IN : 31 34 { 32 if (_return == false) 33 std::cerr << "Signal \"" << _name << "\" is not mapped with an outpout port or a component." << std::endl; 35 if (_is_map_as_toplevel_dest == false) 36 { 37 _return = false; 38 39 str = "Signal \""+_name+"\" is not mapped with an outpout port top-level's interface or a input port component's interface."; 40 } 34 41 break; 35 42 } 36 43 case morpheo::behavioural::OUT : 37 44 { 38 if (_return == false) 39 std::cerr << "Signal \"" << _name << "\" is not mapped with an input port or a component." << std::endl; 45 if (_is_map_as_toplevel_dest == false) 46 { 47 _return = false; 48 str = "Signal \""+_name+"\" is not mapped with an input port top-level's interface or a output port component's interface."; 49 } 40 50 break; 41 51 } 42 //case morpheo::behavioural::INTERNAL : return "internal" ; break;43 //case morpheo::behavioural::INOUT : return "inout" ; break;52 //case morpheo::behavioural::INTERNAL : 53 //case morpheo::behavioural::INOUT : 44 54 default : break; 45 55 } … … 47 57 else 48 58 { 49 _return = _is_map_as_src and _is_map_as_dest; 59 // internal signal : 60 // Component --- I/O (as_src) 61 // Component --- Component (as_src and as_dest) 50 62 51 if (_return == false)63 switch (_direction) 52 64 { 53 if (_is_map_as_src == false) 54 std::cerr << "Signal \"" << _name << "\" is not mapped as source" << std::endl; 55 if (_is_map_as_dest == false) 56 std::cerr << "Signal \"" << _name << "\" is not mapped as destination" << std::endl; 65 case morpheo::behavioural::IN : 66 { 67 if (_is_map_as_component_src == false) 68 { 69 _return = false; 70 71 str = "Signal \""+_name+"\" is not mapped with an input port top-level's interface or a output port component's interface."; 72 } 73 break; 74 } 75 case morpheo::behavioural::OUT : 76 { 77 if (_is_map_as_component_src == false) 78 { 79 _return = false; 80 81 str = "Signal \""+_name+"\" is not mapped with an outpout port top-level's interface or a input port component's interface."; 82 } 83 break; 84 } 85 case morpheo::behavioural::INTERNAL : 86 { 87 if (_is_map_as_component_src == false) 88 { 89 _return = false; 90 91 str = "Internal signal \""+_name+"\" is not mapped with an outpout port top-level's interface or a input port component's interface."; 92 } 93 94 if (_is_map_as_component_dest == false) 95 { 96 if (_return == false) 97 str+="\n"; 98 99 _return = false; 100 101 str += "Internal signal \""+_name+"\" is not mapped with an input port top-level's interface or a output port component's interface."; 102 } 103 104 break; 105 } 106 //case morpheo::behavioural::INOUT : 107 default : break; 57 108 } 58 109 } 59 110 60 111 log_printf(FUNC,Behavioural,FUNCTION,"End"); 112 113 114 115 if (_return == false) 116 { 117 log_printf(NONE,Behavioural,FUNCTION, "%s* %s",tab.c_str(),str.c_str()); 118 119 #ifndef DEBUG 120 std::cerr << str << std::endl; 121 #endif 122 } 123 else 124 { 125 // log_printf(NONE,Behavioural,FUNCTION, "%s* Signal \"%s\" is OK.",tab.c_str(),_name.c_str()); 126 } 61 127 62 128 return _return; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_create_expr.cpp
r71 r78 4 4 namespace morpheo { 5 5 namespace behavioural { 6 void Stat::create_expr (std::string varname, std::string expr, bool each_cycle) 6 7 void Stat::create_expr (std::string varname, 8 std::string expr, 9 bool each_cycle) 7 10 { 8 11 if (is_valid_var (varname)) … … 17 20 _list_expr->push_back(expression); 18 21 } 22 23 void Stat::create_expr_average (std::string varname, 24 std::string expr_sum, 25 std::string expr_deps, 26 std::string unit, 27 std::string description) 28 { 29 create_counter(varname,unit,description); 30 create_expr (varname, "/ "+expr_sum+" "+expr_deps, false); 31 } 32 33 void Stat::create_expr_average_by_cycle (std::string varname, 34 std::string expr_sum, 35 std::string unit, 36 std::string description) 37 { 38 create_expr_average (varname, expr_sum, "cycle", unit, description); 39 } 40 41 void Stat::create_expr_percent (std::string varname, 42 std::string expr_sum, 43 std::string expr_max, 44 std::string description) 45 { 46 create_counter(varname,"%",description); 47 create_expr (varname, "/ * "+expr_sum+" 100 "+expr_max, false); 48 } 49 50 19 51 }; 20 52 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_string2tree.cpp
r71 r78 9 9 Stat_binary_tree * Stat::string2tree (std::string expr) 10 10 { 11 std::cout << "expr : " << expr << std::endl;12 13 11 const std::string delims (" "); // délimiteur : " " 14 12 const std::string numbers ("0123456789"); // délimiteur : " " -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Test.cpp
r59 r78 2 2 * $Id$ 3 3 * 4 * [ 4 * [ Description ] 5 5 * 6 6 */ … … 12 12 namespace behavioural { 13 13 14 bool Parameters::is_natural (double val ) { return ( (val >= 0) && (floor(val) == ceil(val)));};15 bool Parameters::is_positive (double val ) { return ( (val >= 1) && (floor(val) == ceil(val)));};16 bool Parameters::is_multiple (uint32_t val1,17 uint32_t val2) { return is_positive((1.0*val1)/(1.0*val2));}; 18 bool Parameters::is_between_inclusive (uint32_t val, 19 uint32_t min,20 uint32_t max) { return ((val >= min) && (val <= max));};21 bool Parameters::is_between_exclusive (uint32_t val, 22 uint32_t min,23 uint32_t max) { return ((val > min) && (val < max));};24 14 bool is_natural (double val ) { return ( (val >= 0) && (floor(val) == ceil(val)));}; 15 bool is_positive (double val ) { return ( (val >= 1) && (floor(val) == ceil(val)));}; 16 bool is_power2 (uint32_t val) { return is_natural(::log2(static_cast<double>(val)));}; 17 bool is_multiple (uint32_t val1, 18 uint32_t val2) { return is_positive((1.0*val1)/(1.0*val2));}; 19 bool is_between_inclusive (uint32_t val, 20 uint32_t min, 21 uint32_t max) { return ((val >= min) && (val <= max));}; 22 bool is_between_exclusive (uint32_t val, 23 uint32_t min, 24 uint32_t max) { return ((val > min) && (val < max));}; 25 25 }; // end namespace behavioural 26 26 }; // end namespace morpheo -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_get_body.cpp
r71 r78 27 27 std::string tabulation = indent(depth); 28 28 29 //body.insert(0,tabulation);29 body.insert(0,tabulation); 30 30 for (size_t pos=body.find('\n',0); pos<body.length()-1; pos=body.find('\n',++pos)) 31 31 body.insert(++pos,tabulation); -
trunk/IPs/systemC/processor/Morpheo/Common/include/Debug.h
r71 r78 9 9 #include <sstream> 10 10 #include <string> 11 12 std::string debug_tab (void); 13 void debug_function_begin (std::string component, std::string function); 14 void debug_function_end (std::string component, std::string function); 11 15 12 16 // Debug's Level : … … 27 31 28 32 #ifdef DEBUG 29 //Debug 30 # define log_printf(level, component, func, str... ) \ 33 # define log_printf(level, component, func, str... ) \ 31 34 do \ 32 35 { \ … … 36 39 ( DEBUG_ ## component == true )) ) \ 37 40 { \ 41 msg(_("%s"),debug_tab().c_str()); \ 38 42 if (DEBUG >= DEBUG_ALL ) \ 39 43 { \ … … 48 52 } \ 49 53 } \ 50 msg(_("<%s> "),func); \51 54 if (DEBUG >= DEBUG_FUNC) \ 52 55 { \ 56 msg(_("<%s> "),func); \ 53 57 msg(_("In file %s, "),__FILE__); \ 54 msg(_("at line %d, "),__LINE__); \ 58 msg(_("at line %d " ),__LINE__); \ 59 msg(_(": ")); \ 55 60 } \ 56 msg(_(": ")); \57 61 msg(str); \ 58 62 msg(_("\n")); \ … … 60 64 } \ 61 65 } while(0) 62 63 66 #else 64 // No debug 65 66 # define log_printf(level, component, func, str... ) \ 67 do \ 68 { \ 69 } while(0) 70 67 # define log_printf(level, component, func, str... ) \ 68 do \ 69 { \ 70 } while(0) 71 71 #endif // DEBUG 72 73 72 #endif // !DEBUG_H -
trunk/IPs/systemC/processor/Morpheo/Common/include/FromString.h
r43 r78 17 17 namespace morpheo { 18 18 19 template<typename T> inline T fromString (const std::string& x)19 template<typename T> inline T fromString (const std::string& x) 20 20 { 21 21 return static_cast<T>(x.c_str()); 22 22 } 23 23 24 template<> inline int fromString<int>(const std::string& x)24 template<> inline uint32_t fromString<uint32_t> (const std::string& x) 25 25 { 26 return atoi(x.c_str()); 26 return static_cast<uint32_t>(atoi(x.c_str())); 27 } 28 29 template<> inline bool fromString<bool> (const std::string& x) 30 { 31 return atoi(x.c_str())!=0; 27 32 } 28 33 -
trunk/IPs/systemC/processor/Morpheo/Common/include/Time.h
r71 r78 34 34 uint32_t nb_cycles = static_cast<uint32_t>(sc_simulation_time()); 35 35 36 double average = static_cast<double>(nb_cycles) / static_cast<double>(time_end.tv_sec-x.time_begin.tv_sec );36 double average = static_cast<double>(nb_cycles) / static_cast<double>(time_end.tv_sec-x.time_begin.tv_sec+1); 37 37 38 output_stream << nb_cycles << "\t(" << average << " cycles / seconds)" << std::endl;38 output_stream << "Timing : " << nb_cycles << " cycles \t(" << average << " cycles/s)" << std::endl; 39 39 40 40 return output_stream; -
trunk/IPs/systemC/processor/Morpheo/Common/include/ToString.h
r71 r78 58 58 } 59 59 60 //template<> inline std::string toString< int8_t> (const int8_t& x)61 //{62 //std::ostringstream out("");63 // out << x;64 //return out.str();65 //}60 template<> inline std::string toString< int8_t> (const int8_t& x) 61 { 62 std::ostringstream out(""); 63 out << static_cast< int32_t>(x); 64 return out.str(); 65 } 66 66 67 //template<> inline std::string toString<uint8_t> (const uint8_t& x)68 //{69 //std::ostringstream out("");70 // out << x;71 //return out.str();72 //}67 template<> inline std::string toString<uint8_t> (const uint8_t& x) 68 { 69 std::ostringstream out(""); 70 out << static_cast<uint32_t>(x); 71 return out.str(); 72 } 73 73 74 //template<> inline std::string toString< int16_t> (const int16_t& x)75 //{76 //std::ostringstream out("");77 // out << x;78 //return out.str();79 //}74 template<> inline std::string toString< int16_t> (const int16_t& x) 75 { 76 std::ostringstream out(""); 77 out << static_cast< int32_t>(x); 78 return out.str(); 79 } 80 80 81 //template<> inline std::string toString<uint16_t> (const uint16_t& x)82 //{83 //std::ostringstream out("");84 // out << x;85 //return out.str();86 //}81 template<> inline std::string toString<uint16_t> (const uint16_t& x) 82 { 83 std::ostringstream out(""); 84 out << static_cast<uint32_t>(x); 85 return out.str(); 86 } 87 87 88 //template<> inline std::string toString< int32_t> (const int32_t& x)89 //{90 //std::ostringstream out("");91 //out << x;92 //return out.str();93 //}88 template<> inline std::string toString< int32_t> (const int32_t& x) 89 { 90 std::ostringstream out(""); 91 out << x; 92 return out.str(); 93 } 94 94 95 //template<> inline std::string toString<uint32_t> (const uint32_t& x)96 //{97 //std::ostringstream out("");98 //out << x;99 //return out.str();100 //}95 template<> inline std::string toString<uint32_t> (const uint32_t& x) 96 { 97 std::ostringstream out(""); 98 out << x; 99 return out.str(); 100 } 101 101 102 102 }; // end namespace morpheo -
trunk/IPs/systemC/processor/Morpheo/Common/include/Types.h
r43 r78 16 16 17 17 // Definition of type 18 #if ( defined(SC_CLOCK) || defined(SC_INTERNAL) || defined(SC_SIGNAL) || defined(SC_REGISTER) || defined(SC_IN) || defined(SC_OUT) ) 18 //#if ( defined(SC_CLOCK) || defined(SC_INTERNAL) || defined(SC_SIGNAL) || defined(SC_REGISTER) || defined(SC_IN) || defined(SC_OUT) ) 19 #if ( defined(SC_CLOCK) || defined(SC_IN) || defined(SC_OUT) ) 19 20 # error "A type is already defined" 20 21 #endif … … 23 24 # error "Action is already defined" 24 25 #endif 25 #if ( defined(INTERNAL_READ) || defined(INTERNAL_WRITE) )26 # error "Action is already defined"27 #endif28 #if ( defined(SIGNAL_READ) || defined(SIGNAL_WRITE) )29 # error "Action is already defined"30 #endif31 #if ( defined(REGISTER_READ) || defined(REGISTER_WRITE) )32 # error "Action is already defined"33 #endif26 // #if ( defined(INTERNAL_READ) || defined(INTERNAL_WRITE) ) 27 // # error "Action is already defined" 28 // #endif 29 // #if ( defined(SIGNAL_READ) || defined(SIGNAL_WRITE) ) 30 // # error "Action is already defined" 31 // #endif 32 // #if ( defined(REGISTER_READ) || defined(REGISTER_WRITE) ) 33 // # error "Action is already defined" 34 // #endif 34 35 35 36 #define SC_CLOCK sc_in_clk 36 #define SC_INTERNAL(type) type37 #define SC_REGISTER(type) sc_signal<type >38 #define SC_SIGNAL(type) sc_signal<type >37 // #define SC_INTERNAL(type) type 38 // #define SC_REGISTER(type) sc_signal<type > 39 // #define SC_SIGNAL(type) sc_signal<type > 39 40 #define SC_IN(type) sc_in <type > 40 41 #define SC_OUT(type) sc_out <type > … … 42 43 #define PORT_READ(sig) sig->read() 43 44 #define PORT_WRITE(sig,val) sig->write(val) 44 #define INTERNAL_READ(sig) (*sig)45 #define INTERNAL_WRITE(sig,val) (*sig) = val46 #define SIGNAL_READ(sig) sig->read()47 #define SIGNAL_WRITE(sig,val) sig->write(val)48 #define REGISTER_READ(sig) sig->read()49 #define REGISTER_WRITE(sig,val) sig->write(val)45 // #define INTERNAL_READ(sig) (*sig) 46 // #define INTERNAL_WRITE(sig,val) (*sig) = val 47 // #define SIGNAL_READ(sig) sig->read() 48 // #define SIGNAL_WRITE(sig,val) sig->write(val) 49 // #define REGISTER_READ(sig) sig->read() 50 // #define REGISTER_WRITE(sig,val) sig->write(val) 50 51 51 52 #endif -
trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Include/doc-style.sty
r63 r78 3 3 \usepackage{makeidx} 4 4 \usepackage{palatino} 5 \usepackage{fancyheadings}5 %\usepackage{fancyheadings} 6 6 \usepackage{float} 7 7 \usepackage{verbatim} -
trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Include/ppt-style.sty
r59 r78 39 39 } 40 40 41 42 43 44 41 \newcommand{\slidetitle}[3] 42 { 43 \slide{\frametitle{#1}#2}{#3} 44 } 45 45 46 46 \newcommand{\Contents} -
trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Info/presentation-internal_seminary_overview.tex
r57 r78 2 2 \documentclass{beamer} 3 3 \usepackage{beamerthemetree} 4 5 6 7 8 -
trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Makefile
r75 r78 133 133 done; \ 134 134 declare -i NUM_TYPE; \ 135 $(READ) NUM_TYPE;\135 read NUM_TYPE; \ 136 136 \ 137 137 if $(TEST) "$$NUM_TYPE" -ge "$$CPT"; then \ … … 143 143 $(ECHO) ""; \ 144 144 $(ECHO) "Give the name of the documents :"; \ 145 $(READ) FILENAME;\145 read FILENAME; \ 146 146 \ 147 147 if $(TEST) -z "$$FILENAME" -o -d "$(DIR_TYPE)/$$FILENAME.type"; \ 148 148 then \ 149 149 $(ECHO) "Invalid name : string is empty, or filename is already used"; \ 150 exit; \150 exit; \ 151 151 fi; \ 152 152 \ … … 194 194 CPT=$$(($$CPT+1)); \ 195 195 done; \ 196 $(READ) NUM_FILE;\196 read NUM_FILE; \ 197 197 \ 198 198 if $(TEST) "$$NUM_FILE" -ge "$$CPT"; then \ … … 201 201 \ 202 202 $(ECHO) "Please reenter the document id to confirm the delete"; \ 203 $(READ) NUM_FILE_CONFIRM;\203 read NUM_FILE_CONFIRM; \ 204 204 \ 205 205 if $(TEST) "$$NUM_FILE" -eq "0" -o "$$NUM_FILE" -ne "$$NUM_FILE_CONFIRM"; then \ … … 245 245 CPT=$$(($$CPT+1)); \ 246 246 done; \ 247 $(READ) NUM_FILE;\247 read NUM_FILE; \ 248 248 \ 249 249 if $(TEST) "$$NUM_FILE" -ge "$$CPT"; then \ … … 261 261 \ 262 262 $(ECHO) "Give the new name of the documents :"; \ 263 $(READ)FILENAME_DEST; \263 read FILENAME_DEST; \ 264 264 \ 265 265 if $(TEST) -z "$$FILENAME_DEST" -o -d "$(DIR_TYPE)/$$FILENAME_DEST.type"; \ … … 277 277 $(ECHO) "Rename file : $(DIR_PACKAGE)/$$FILENAME_SRC.sty"; \ 278 278 $(MV) $(DIR_PACKAGE)/$$FILENAME_SRC.sty $(DIR_PACKAGE)/$$FILENAME_DEST.sty; \ 279 \ 280 $(ECHO) "Rename file : $(DIR_PACKAGE)/$$FILENAME_SRC.tex"; \ 281 $(MV) $(DIR_PACKAGE)/$$FILENAME_SRC.tex $(DIR_PACKAGE)/$$FILENAME_DEST.tex; \ 279 282 \ 280 283 $(ECHO) "Rename directory : $(DIR_DOCUMENTS)/$$FILENAME_SRC"; \ … … 310 313 CPT=$$(($$CPT+1)); \ 311 314 done; \ 312 $(READ) NUM_FILE;\315 read NUM_FILE; \ 313 316 \ 314 317 if $(TEST) "$$NUM_FILE" -ge "$$CPT"; then \ … … 333 336 CPT=$$(($$CPT+1)); \ 334 337 done; \ 335 $(READ) NUM_LANG;\338 read NUM_LANG; \ 336 339 \ 337 340 if $(TEST) "$$NUM_LANG" -ge "$$CPT"; then \ … … 359 362 CPT=$$(($$CPT+1)); \ 360 363 done; \ 361 $(READ)NUM_FORMAT; \364 read NUM_FORMAT; \ 362 365 \ 363 366 if $(TEST) "$$NUM_FORMAT" -ge "$$CPT"; then \ … … 412 415 @\ 413 416 $(ECHO) "Generate files : $*.eps"; \ 414 $(CD)$(DIR_GRAPH); $(GNUPLOT) $*.p;417 cd $(DIR_GRAPH); $(GNUPLOT) $*.p; 415 418 416 419 #-------------------------------------------------------------------------------- -
trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_micro_architecture-overview.fig
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Groupe\001 71 4 0 0 50 -1 -1 12 0.0000 4 180 2280 2340 5310 Une occurence dans le groupe\001 72 4 0 0 50 -1 -1 12 0.0000 4 180 2760 2340 5040 Plusieurs occurences dans le groupe\001 55 4 0 0 50 -1 -1 12 0.0000 4 195 660 2340 4770 Groupe\001 56 4 0 0 50 -1 -1 12 0.0000 4 195 2610 2340 5310 Une occurence dans le groupe\001 57 4 0 0 50 -1 -1 12 0.0000 4 195 3120 2340 5040 Plusieurs occurences dans le groupe\001 58 -6 59 6 6570 3015 7290 3465 60 2 4 0 1 0 31 50 -1 20 4.000 0 0 7 0 0 5 61 7290 3465 6570 3465 6570 3015 7290 3015 7290 3465 62 4 1 0 50 -1 -1 12 0.0000 4 150 645 6930 3285 commit\001 63 -6 64 6 4770 3690 5490 4140 65 2 4 0 1 0 31 50 -1 20 4.000 0 0 7 0 0 5 66 5490 4140 4770 4140 4770 3690 5490 3690 5490 4140 67 4 1 0 50 -1 0 12 0.0000 4 150 525 5130 3960 decod\001 73 68 -6 74 69 2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 4 … … 170 165 2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5 171 166 10530 3870 9810 3870 9810 3420 10530 3420 10530 3870 172 4 1 0 50 -1 -1 12 0.0000 4 180 585 10170 4905 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-1 12 0.0000 4 195 1365 8190 3015 Execution Loop\001 175 4 0 1 50 -1 -1 12 0.0000 4 195 1770 5760 2520 Out Of Order Engine\001 176 4 1 0 50 -1 -1 12 1.5708 4 150 510 7875 3600 select\001 177 4 1 0 50 -1 -1 12 0.0000 4 120 690 10170 4230 execute\001 178 4 1 0 50 -1 -1 12 0.0000 4 150 720 10170 3690 memory\001 179 4 1 0 50 -1 0 12 0.0000 4 105 660 6210 3960 rename\001 -
trunk/IPs/systemC/processor/Morpheo/Script/execute.sh
r2 r78 7 7 declare FILE_CPT=; 8 8 declare FILE_CPU=; 9 declare LOCK_CPT="$ HOME/.lock-cpt";10 declare LOCK_CPU="$ HOME/.lock-cpu";11 9 declare LOCK_CPT="${HOME}/.lock-cpt"; 10 declare LOCK_CPU="${HOME}/.lock-cpu"; 11 12 12 #-----[ lock ]---------------------------------------------- 13 13 function lock () -
trunk/IPs/systemC/processor/Morpheo/Script/execute_n.sh
r2 r78 8 8 declare FILE_CPT; 9 9 declare FILE_CPU; 10 declare ID="cpu-$ HOSTNAME-$$"10 declare ID="cpu-${HOSTNAME}-$$" 11 11 12 12 #-----[ usage ]--------------------------------------------- 13 13 function usage () 14 14 { 15 echo "Usage : $0 file [ nb_process ]"; 16 echo " * file : list of command"; 17 echo " * nb_process : number of process (default (and maximum) is the number of processor)"; 15 echo "Usage : $0 file [ nb_process ]"; 16 echo "Arguments : "; 17 echo " * file : list of command"; 18 echo " * nb_process : number of process (default (and maximum) is the number of processor)"; 18 19 echo ""; 19 echo "Note - This script, for each command, create a directory : Task_X (X is the number of command), and execute the command in this directory."; 20 echo " - Two file is generate : \"output\" is the output of the execution, and \"command\" is the command lunch."; 21 echo " - A command empty (no command on a line of file1) is a synchronisation with all process" 22 echo " - Don't forgot the final end of line (else the last command is not executed"; 20 echo "Note : "; 21 echo " * This script, for each command, create a directory : Task_X (X is the number of command), and execute the command in this directory."; 22 echo " * Two file is generate : \"output\" is the output of the execution, and \"command\" is the command lunch."; 23 echo " * A command empty (no command on a line of file) is a synchronisation with all process" 24 echo " * Don't forgot the final end of line (else the last command is not executed"; 23 25 echo ""; 24 26 exit; … … 30 32 local FILE_CPUINFO=/proc/cpuinfo; 31 33 if test ! -f $FILE_CPUINFO; then 32 echo "\"$ FILE_CPUINFO\" don't exist."34 echo "\"${FILE_CPUINFO}\" don't exist." 33 35 usage; 34 36 fi; 35 37 36 eval "$1=`grep -c \"processor\" $ FILE_CPUINFO`";38 eval "$1=`grep -c \"processor\" ${FILE_CPUINFO}`"; 37 39 } 38 40 -
trunk/IPs/systemC/processor/Morpheo/Script/lock.sh
r2 r78 4 4 function usage () 5 5 { 6 echo "Usage : ${0} file"; 7 echo "lock file, you can see the lock at \"~/.$(basename file).lock\"" 6 echo "Usage : ${0} file"; 7 echo "Arguments : "; 8 echo ' * file : you can see the lock at "${MORPHEO_HOME}/lock/$(basename file).lock"'; 9 echo "Notes :"; 10 echo " * Morpheo's environnement must be positionned."; 11 8 12 exit; 9 13 } … … 18 22 function main () 19 23 { 20 if test ${#} -ne 1 -o ! -f ${1}; then 24 LOCK_DIRECTORY="${MORPHEO_HOME}/lock"; 25 26 if test ${#} -ne 1 -o -z ${MORPHEO_HOME} -o ! -d ${LOCK_DIRECTORY}; then 21 27 usage ${*}; 22 28 fi; 23 29 24 lock "${ HOME}/.$(basename ${1}).lock"30 lock "${LOCK_DIRECTORY}/$(basename ${1}).lock" 25 31 } 26 32 -
trunk/IPs/systemC/processor/Morpheo/Script/log_trace.pl
r2 r78 20 20 sub usage() 21 21 { 22 print "usage : $0 rob_trace_file nm_file\n"; 23 print " * rob_trace_file : Trace file generate by simulation\n"; 24 print " * nm_file : List of symbol (generate by nm)\n"; 22 print "Usage : $0 rob_trace_file nm_file\n"; 23 print "Arguments : "; 24 print " * rob_trace_file : Trace file generate by simulation\n"; 25 print " * nm_file : List of symbol (generate by nm)\n"; 25 26 exit(1); 26 27 } -
trunk/IPs/systemC/processor/Morpheo/Script/range.sh
r57 r78 4 4 function usage () 5 5 { 6 echo "Usage : $0 min max [step [iter]]"; 6 echo "Usage : ${0} min max [step [iter]]"; 7 echo "Arguments : "; 7 8 echo " * min : value minimal"; 8 9 echo " * max : value maximal"; … … 15 16 function range () 16 17 { 17 declare a=$ 1;18 declare b=$ 2;19 declare step=$ 3;18 declare a=${1}; 19 declare b=${2}; 20 declare step=${3}; 20 21 21 while test $ a -lt $b; do22 echo $ a;23 a=$(($ a $step));22 while test ${a} -lt ${b}; do 23 echo ${a}; 24 a=$((${a} ${step})); 24 25 done 25 26 26 if test $ a -eq $b; then27 echo $ a;27 if test ${a} -eq ${b}; then 28 echo ${a}; 28 29 fi; 29 30 } … … 32 33 function range_max () 33 34 { 34 declare a=$ 1;35 declare b=$ 2;36 declare step=$ 3;37 declare iter=$ 4;35 declare a=${1}; 36 declare b=${2}; 37 declare step=${3}; 38 declare iter=${4}; 38 39 39 while test $ a -lt $b -a $iter-gt 1; do40 a=$(($ a $step));41 iter=$(($ iter-1));40 while test ${a} -lt ${b} -a ${iter} -gt 1; do 41 a=$((${a} ${step})); 42 iter=$((${iter}-1)); 42 43 done; 43 44 44 if test $ a -eq $b; then45 echo $ a;45 if test ${a} -eq ${b}; then 46 echo ${a}; 46 47 fi; 47 48 48 if test $ iter-eq 1; then49 echo $ a;49 if test ${iter} -eq 1; then 50 echo ${a}; 50 51 fi; 51 52 } … … 55 56 { 56 57 # create operande 57 case $ #in58 2) range $ *"+1";;59 3) range $ *;;60 4) range_max $ *;;61 *) usage $ *58 case ${#} in 59 2) range ${*} "+1";; 60 3) range ${*} ;; 61 4) range_max ${*} ;; 62 *) usage ${*} 62 63 esac 63 64 } 64 65 65 66 #-----[ Corps ]--------------------------------------------- 66 main $ *67 main ${*} -
trunk/IPs/systemC/processor/Morpheo/Script/unlock.sh
r2 r78 4 4 function usage () 5 5 { 6 echo "Usage : ${0} file"; 7 echo "unlock file, you can see the lock at \"~/.$(basename file).lock\"" 6 echo "Usage : ${0} file"; 7 echo "Arguments : "; 8 echo ' * file : you can see the lock at "${MORPHEO_HOME}/lock/$(basename file).lock"'; 9 echo "Notes :"; 10 echo " * Morpheo's environnement must be positionned."; 11 8 12 exit; 9 13 } … … 18 22 function main () 19 23 { 20 if test ${#} -ne 1 -o ! -f ${1}; then 24 LOCK_DIRECTORY="${MORPHEO_HOME}/lock"; 25 26 if test ${#} -ne 1 -o -z ${MORPHEO_HOME} -o ! -d ${LOCK_DIRECTORY}; then 21 27 usage ${*}; 22 28 fi; 23 29 24 unlock "${ HOME}/.$(basename ${1}).lock"30 unlock "${LOCK_DIRECTORY}/$(basename ${1}).lock" 25 31 } 26 32 -
trunk/IPs/systemC/processor/Morpheo/Script/xilinx_extract_info.sh
r71 r78 2 2 3 3 for i in *.fpga.log; do 4 5 4 echo "===== $i"; 6 5 grep "Number of Slice Registers" $i; -
trunk/Makefile.tools
r68 r78 6 6 MKDIR = mkdir -p 7 7 TEST = test 8 READ = read9 8 DATE = date +%Y%m%d-%H%M%S 10 CD = cd11 9 CP = cp 10 MV = mv 12 11 CAT = cat 13 12 LS = ls … … 24 23 UPPERtoLOWER = $(TR) [:lower:] [:upper:] 25 24 CXX = export LANG=C; g++-3.4 25 CXX_FLAGS = -O3 \ 26 -g3 \ 27 -Wall \ 28 -Wunused 29 26 30 SED = sed 27 31 TOUCH = touch … … 40 44 VIEWPS = gv 41 45 VIEWPDF = xpdf 42 VIEWPDF_FS = xpdf -fullscreen 43 #VIEWPDF_FS = acroread 46 VIEWPDF_FS = $(VIEWPDF) -fullscreen 44 47 45 48 #---------------------------------------------------------- -
trunk/Makefile.tools_path
r68 r78 2 2 # kane@HOME 3 3 #-----[ path ]--------------------------------------------- 4 ENV = export PATH=$$PATH:/bin:/usr/bin 4 5 SOCLIB = 5 6 SYSTEMC_systemc = /home/data/Tools/systemc-2.2.0 … … 16 17 # kane@LABS 17 18 #-----[ path ]--------------------------------------------- 19 #ENV = export PATH=$$PATH:/bin:/usr/bin 18 20 #SOCLIB = /users/outil/soc/soclib 19 21 #SYSTEMC_systemc = /users/outil/systemc/systemc-2.1.v1 -
trunk/Softwares/Min.or32/Makefile
r68 r78 1 1 # common definition 2 include Makefile.morpheo 2 DIRECTORY_SRC = ./src 3 DIRECTORY_C = $(DIRECTORY_SRC)/c 4 DIRECTORY_ASM = $(DIRECTORY_SRC)/asm 5 DIRECTORY_SYS = $(DIRECTORY_SRC)/sys 6 DIRECTORY_INCLUDE = $(DIRECTORY_C)/include 7 DIRECTORY_LDSCRIPT = $(DIRECTORY_SRC)/ldscript/ 3 8 4 #-----[ Directory ]--------------------------------------------------------------- 5 DIR_SRC = ./src 6 DIR_C = $(DIR_SRC)/c 7 DIR_ASM = $(DIR_SRC)/asm 8 DIR_SYS = $(DIR_SRC)/sys 9 DIR_INC = $(DIR_C)/include 10 11 DIR_OBJ = obj 12 DIR_BIN = bin 13 14 EXE = soft 9 INCLUDE = -I$(DIRECTORY_INCLUDE) 10 LIBRARY = 15 11 16 12 #-----[ Files ]------------------------------------------------------------------- 17 OBJ _ASM = $(patsubst $(DIR_ASM)/%.s,$(DIR_OBJ)/%.o,$(wildcard $(DIR_ASM)/*.s))18 OBJ _SYS = $(patsubst $(DIR_SYS)/%.s,$(DIR_OBJ)/%.o,$(wildcard $(DIR_SYS)/*.s))19 OBJ _C = $(patsubst $(DIR_C)/%.c,$(DIR_OBJ)/%.o,$(wildcard $(DIR_C)/*.c))13 OBJECTS_ASM = $(patsubst $(DIRECTORY_ASM)/%.s,$(DIRECTORY_OBJ)/%.o,$(wildcard $(DIRECTORY_ASM)/*.s)) 14 OBJECTS_SYS = $(patsubst $(DIRECTORY_SYS)/%.s,$(DIRECTORY_OBJ)/%.o,$(wildcard $(DIRECTORY_SYS)/*.s)) 15 OBJECTS_C = $(patsubst $(DIRECTORY_C)/%.c,$(DIRECTORY_OBJ)/%.o,$(wildcard $(DIRECTORY_C)/*.c)) 20 16 21 OBJ = $(OBJ_SYS) $(OBJ_ASM) $(OBJ_C) 17 include ../Makefile.Software 22 18 23 #-----[ Rules ]-------------------------------------------------------------------24 .PRECIOUS : $(DIR_BIN)/%.x $(DIR_OBJ)/%.o $(DIR_OBJ)/%.a25 26 all : test_env $(DIR_BIN)/$(EXE).x.txt27 28 $(DIR_BIN)/%.x.txt : $(DIR_BIN)/%.x29 @\30 $(ECHO) "List symbols of $*"; \31 $(NM) $(NM_OPT) $^ > $@.nm; \32 $(ECHO) "Display information of $*"; \33 $(OBJDUMP) $(OBJDUMP_OPT) $^ > $@;34 35 $(DIR_BIN)/%.x : $(OBJ_SYS) $(OBJ)36 @ \37 $(ECHO) "Linkage of $*"; \38 $(LD) -o $@ $^ $(LD_OPT);39 40 $(DIR_OBJ)/%.o : $(DIR_ASM)/%.s41 @ \42 $(ECHO) "Compile of $*"; \43 $(CC) $(CC_OPT) -I$(DIR_INC) -o $@ -c $^ ; \44 $(CC) $(CC_OPT) -I$(DIR_INC) -S -o $@.s -c $^ ;45 # @$(AS) $(AS_OPT) $^ -o $@46 47 $(DIR_OBJ)/%.o : $(DIR_SYS)/%.s48 @ \49 $(ECHO) "Compile of $*"; \50 $(CC) $(CC_OPT) -I$(DIR_INC) -o $@ -c $^ ; \51 $(CC) $(CC_OPT) -I$(DIR_INC) -S -o $@.s -c $^ ;52 # @$(AS) $(AS_OPT) $^ -o $@53 54 $(DIR_OBJ)/%.o : $(DIR_C)/%.c55 @ \56 $(ECHO) "Compile of $*"; \57 $(CC) $(CC_OPT) -I$(DIR_INC) -o $@ -c $^ ; \58 $(CC) $(CC_OPT) -I$(DIR_INC) -S -o $@.s -c $^ ;59 60 #-----[ Environement ]------------------------------------------------------------61 test_env :62 # ifeq ($(origin TOOLS), undefined)63 # $(error "variable TOOLS is undefined");64 # endif65 # ifeq ($(origin SOFT), undefined)66 # $(error "variable SOFT is undefined");67 # endif68 @$(MKDIR) $(DIR_OBJ) $(DIR_BIN)69 70 #-----[ Maintenance ]-------------------------------------------------------------71 clean :72 @\73 $(ECHO) "Delete temporary files "`$(PWD)`; \74 $(RM) $(DIR_OBJ) $(DIR_BIN); \75 $(MAKE) clean_rec DIR_CLEAN=.;76 77 #Clean recursive78 clean_rec :79 @\80 $(ECHO) "Delete temporary files in directory $(DIR_CLEAN)"; \81 $(RM) -f $(DIR_CLEAN)/*~; \82 for files in `$(LS) $(DIR_CLEAN)`; do \83 if $(TEST) -d $(DIR_CLEAN)/$$files; \84 then \85 $(MAKE) clean_rec DIR_CLEAN=$(DIR_CLEAN)/$$files; \86 fi; \87 done;88 89 #-----[ Help ]--------------------------------------------------------------------90 help :91 @\92 $(ECHO) "";\93 $(ECHO) "List of directive : ";\94 $(ECHO) " * make : Compile the software";\95 $(ECHO) " * make clean : Erase all files generates";\96 $(ECHO) ""; -
trunk/Softwares/Min.or32/src/sys/crt0.s
r2 r78 16 16 l.nop 0 ; 17 17 */ 18 18 19 .file "crt0.s" 19 20 /* … … 511 512 l.rfe 512 513 l.nop 0 513
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