Changeset 200 for trunk/modules/vci_mem_cache_v4/caba/source/include

Timestamp:

Feb 21, 2012, 7:55:14 PM (12 years ago)

Author:

alain

Message:

 

Location:

trunk/modules/vci_mem_cache_v4/caba/source/include

Files:

• update_tab_v4.h (modified) (2 diffs)
• vci_mem_cache_v4.h (modified) (3 diffs)

trunk/modules/vci_mem_cache_v4/caba/source/include/update_tab_v4.h

@@ -15 +15 @@
 
   public:
-  bool  valid;                // It is a valid pending transaction
-  bool  update;               // It is an update transaction
-  bool  brdcast;              // It is a broadcast invalidate
-  bool  rsp;                  // It needs a response to the initiator
-  size_t        srcid;        // The srcid of the initiator which wrote the data
-  size_t        trdid;        // The trdid of the initiator which wrote the data
-  size_t        pktid;        // The pktid of the initiator which wrote the data
-  addr_t        nline;        // The identifier of the cache line
-  size_t        count;        // The number of acknowledge responses to receive
+  bool      valid;      // It is a valid pending transaction
+  bool      update;     // It is an update transaction
+  bool      brdcast;    // It is a broadcast invalidate
+  bool      rsp;        // It needs a response to the initiator
+  size_t        srcid;      // The srcid of the initiator which wrote the data
+  size_t        trdid;      // The trdid of the initiator which wrote the data
+  size_t        pktid;      // The pktid of the initiator which wrote the data
+  addr_t        nline;      // The identifier of the cache line
+  size_t        count;      // The number of acknowledge responses to receive
 
   UpdateTabEntry(){
@@ -49 +49 @@
     valid       = i_valid;
     update      = i_update;
-    brdcast     = i_brdcast;
-    rsp         = i_rsp;
+    brdcast = i_brdcast;
+    rsp     = i_rsp;
     srcid       = i_srcid;
     trdid       = i_trdid;

trunk/modules/vci_mem_cache_v4/caba/source/include/vci_mem_cache_v4.h

@@ -146 +146 @@
         WRITE_NEXT,
         WRITE_DIR_LOCK,
-        WRITE_DIR_HIT_READ,
+        WRITE_DIR_READ,
         WRITE_DIR_HIT,
         WRITE_UPT_LOCK,
-        WRITE_HEAP_LOCK,
+        WRITE_UPT_HEAP_LOCK,
         WRITE_UPT_REQ,
-        WRITE_UPDATE,
+        WRITE_UPT_NEXT,
         WRITE_UPT_DEC,
         WRITE_RSP,
-        WRITE_TRT_LOCK,
-        WRITE_TRT_DATA,
-        WRITE_TRT_SET,
+        WRITE_MISS_TRT_LOCK,
+        WRITE_MISS_TRT_DATA,
+        WRITE_MISS_TRT_SET,
+        WRITE_MISS_XRAM_REQ,
+        WRITE_BC_TRT_LOCK,
+        WRITE_BC_UPT_LOCK,
+        WRITE_BC_DIR_INVAL,
+        WRITE_BC_CC_SEND,
+        WRITE_BC_XRAM_REQ,
         WRITE_WAIT,
-        WRITE_XRAM_REQ,
-        WRITE_TRT_WRITE_LOCK,
-        WRITE_INVAL_LOCK,
-        WRITE_DIR_INVAL,
-        WRITE_INVAL,
-        WRITE_XRAM_SEND,
       };
 
@@ -211 +211 @@
         SC_DIR_HIT_WRITE,
         SC_UPT_LOCK,
-        SC_WAIT,
-        SC_HEAP_LOCK,
+        SC_UPT_HEAP_LOCK,
         SC_UPT_REQ,
         SC_UPT_NEXT,
-        SC_TRT_PUT_LOCK,
-        SC_INVAL_LOCK,
-        SC_DIR_INVAL,
-        SC_INVAL,
-        SC_TRT_PUT_REQ,
+        SC_BC_TRT_LOCK,
+        SC_BC_UPT_LOCK,
+        SC_BC_DIR_INVAL,
+        SC_BC_CC_SEND,
+        SC_BC_XRAM_REQ,
         SC_RSP_FAIL,
         SC_RSP_SUCCESS,
-        SC_TRT_GET_LOCK,
-        SC_TRT_GET_SET,
-        SC_TRT_GET_REQ,
+        SC_MISS_TRT_LOCK,
+        SC_MISS_TRT_SET,
+        SC_MISS_XRAM_REQ,
+        SC_WAIT,
       };
 
@@ -473 +473 @@
       sc_signal<data_t>   *r_write_data;            // data (one cache line)    
       sc_signal<be_t>     *r_write_be;              // one byte enable per word
-      sc_signal<bool>      r_write_byte;            // is it a byte write
+      sc_signal<bool>      r_write_byte;            // (BE != 0X0) and (BE != 0xF)
       sc_signal<bool>      r_write_is_cnt;          // is_cnt bit (in directory)
       sc_signal<bool>      r_write_lock;            // lock bit (in directory)